JD54LS164BCA National Semiconductor, JD54LS164BCA Datasheet - Page 91

• Manufacturer Part Number: JD54LS164BCA
• Manufacturer: National Semiconductor

Specifications of JD54LS164BCA

• Lead Free Status / Rohs Status: Not Compliant

FOOTNOTES:
A. Apply input pulse:
B. Apply input pulse:
C. V
D. V
E. Test numbers 62 through 87 shall be run in sequence.
F. Output voltages shall be either: (1) H 2.5 V minimum and L 0.4 V maximum when using a high speed checker double comparator: (2) H 1.5 V and L <1.5 V when using a high
G. f
J. 3.0 V minimum/5.0 V maximum.
1/ I
2/ I
are -15 to -100 mA.
speed checker single comparator.
shall be one-half of the clock input frequency and the parallel input shall be shifted such that the parallel input
Input peak voltage 3 to 5 volts.
OS
MAX
IL
IN
IN
limits (mA) min/max values for circuits shown:
limits for circuit A for QA through QD are -30 to -130 mA, for QD' is -20 to -100 mA, and for circuits B, C, and D
= 2.4V.
= 0.4 V.
minimum limit specified is the frequency of the clock input pulse. The output frequency shall be one-half of the input clock frequency. The input frequency on the parallel input
Parameter
I
IL1
CLR, Load,
CONT, CLK
A
Terminal
IN
Serial
, B
D
IN
IN,
C
IN
-.075/-.250
-.12/-.36
-.16/-.40
-.16/-.40
2.5 V minimum/5.5 V maximum.
0 V
0 V-
A
2.5 V minimum/5.5 V maximum
-.16/-.40
-.03/-.30
B
"
"
-.105/-.345
-.105/-.345
-.16/-.40
-.12/-.36
C
-.105/-.345
-.12/-.36
-.12/-.36
-.12/-.36
D
and
are coincident with the clock
. Rise and fall times
6 ns.