JD54LS164BCA National Semiconductor, JD54LS164BCA Datasheet - Page 68

• Manufacturer Part Number: JD54LS164BCA
• Manufacturer: National Semiconductor

Specifications of JD54LS164BCA

• Lead Free Status / Rohs Status: Not Compliant

FOOTNOTES:
A. Apply input pulse:
B. Apply input pulse:
C. V
D. V
E. Test numbers 54 through 99 shall be run in sequence.
F. Output voltages shall be either: (1) H 2.5 V minimum and L 0.4 V maximum when using a high speed checker double comparator; (2) H 1.5 V and L <1.5 V when using a high
G. f
J. 3.0 V minimum/5.0 V maximum.
1/ This pulse must occur after the clear pulse.
2/ I
speed checker single comparator.
shall be one-half of the clock input frequency and the parallel input shall be shifted such that the parallel input
Input peak voltage 3 to 5 volts.
MAX
IL
IN
IN
limits (mA) min/max values for circuits shown:
Parameter
= 2.5 V.
= 0.4 V.
minimum limit specified is the frequency of the clock input pulse. The output frequency shall be one-half of the input clock frequency. The input frequency on the parallel input
I
IL1
B
J, K, A
Shift load
Terminal
IN
, C
CLR
CLK
IN
, D
IN
,
IN
-.16/-.4
A
"
"
"
-.11/-.35
-.16/-.4
-.08/-.3
-.03/-.3
2.5 V minimum/5.5 V maximum.
0 V
2.5 V minimum/5.5 V maximum
0 V
B
-.20/-.44
-.16/-.4
C
"
"
-.12/-.35
-.12/-.36
-.12/-.36
-.16/-.4
D
-.105/-.345
-.12/-.36
-.12/-.36
-.12/-.36
E
-.12/-.36
F
"
"
"
-.15/-.38
-.16/-.4
and
G
"
"
are coincident with the clock
. Rise and fall times
6 ns.