AD5391BSTZ-5 Analog Devices Inc, AD5391BSTZ-5 Datasheet - Page 37

IC DAC 12BIT 16CHAN 3V 52LQFP

AD5391BSTZ-5

Manufacturer Part Number
AD5391BSTZ-5
Description
IC DAC 12BIT 16CHAN 3V 52LQFP
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD5391BSTZ-5

Data Interface
I²C, Serial
Design Resources
8 to 16 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5390/1/2 (CN0029) AD5390/91/92 Channel Monitor Function (CN0030)
Settling Time
6µs
Number Of Bits
12
Number Of Converters
16
Voltage Supply Source
Single Supply
Power Dissipation (max)
35mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
52-LQFP
Resolution (bits)
12bit
Sampling Rate
167kSPS
Input Channel Type
Serial
Supply Voltage Range - Analogue
4.5V To 5.5V
Supply Voltage Range - Digital
2.7V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD5391EBZ - BOARD EVALUATION FOR AD5391
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Price
Part Number:
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Manufacturer:
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Quantity:
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APPLICATION INFORMATION
POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful
consideration of the power supply and ground return layout
helps to ensure the rated performance. The printed circuit
board on which the AD539x is mounted should be designed so
that the analog and digital sections are separated and confined
to certain areas of the board. If the AD539x is in a system where
multiple devices require an AGND-to-DGND connection, the
connection should be made at one point only. The star ground
point should be established as close as possible to the device.
For supplies with multiple pins (AV
mended to tie those pins together. The AD539x should have
ample supply bypassing of 10 µF in parallel with 0.1 µF on each
supply located as close to the package as possible—ideally right
up against the device. The 10 µF capacitors are the tantalum
bead type. The 0.1 µF capacitor should have low effective series
resistance (ESR) and effective series inductance (ESI), such as
the common ceramic types that provide a low impedance path
to ground at high frequencies, to handle transient currents due
to internal logic switching.
The power supply lines of the AD539x should use as large a
trace as possible to provide low impedance paths and reduce
the effects of glitches on the power supply line. Fast switching
signals such as clocks should be shielded with digital ground
to avoid radiating noise to other parts of the board, and should
never be run near the reference inputs. A ground line routed
between the DIN and SCLK lines helps reduce crosstalk
between them (not required on a multilayer board, because
there is a separate ground plane, but separating the lines helps).
Avoid crossover of digital and analog signals. Traces on opposite
sides of the board should run at right angles to each other. This
reduces the effects of feedthrough through the board. A micro-
strip technique is by far the best, but not always possible with a
double-sided board. In this technique, the component side of
the board is dedicated to ground plane, while signal traces are
placed on the soldered side.
TYPICAL CONFIGURATION CIRCUIT
Figure 40 shows a typical configuration for the AD539x-5 when
configured for use with an external reference. In the circuit
shown, all AGND, SIGNAL_GND, and DAC_GND pins are tied
together to a common AGND. AGND and DGND are
connected together at the AD539x device. On power-up, the
AD539x defaults to external reference operation. All AV
are connected together and driven from the same 5 V source. It
is recommended to decouple close to the device with a 0.1 µF
ceramic and a 10 µF tantalum capacitor. In this application, the
reference for the AD539x-5 is provided externally from either
an ADR421 or ADR431 2.5 V reference. Suitable external
references for the AD539x-3 include the ADR280 1.2 V
DD
, AV
CC
), it is recom-
DD
lines
Rev. A | Page 37 of 44
reference. The reference should be decoupled at the
REFOUT/REFIN pin of the device with a 0.1 µF capacitor.
Figure 41 shows a typical configuration when using the internal
reference. On power-up, the AD539x defaults to an external
reference; therefore, the internal reference needs to be config-
ured and turned on via a write to the AD539x control register.
On the AD5390/AD5392 Control Register Bit CR12 lets the
user choose the reference voltage; Bit CR10 is used to select the
internal reference. It is recommended to use the 2.5 V reference
when AV
the AD5391, Control Register Bit CR10 lets the user choose the
reference voltage; Bit CR8 is used to select the internal
reference.
ADR431/
ADR421
0.1µF
Figure 40. Typical Configuration with External Reference
Figure 41. Typical Configuration with Internal Reference
DD
0.1µF
= 5 V, and the 1.25 V reference when AV
DAC_GND
REFOUT/REFIN
REF_GND
DAC_GND
REFOUT/REFIN
REF_GND
AV
AV
DD
DD
0.1µF
AV
AV
10µF
SIGNAL_GND
AD5390/AD5391/AD5392
DD
DD
AD539x
0.1µF
SIGNAL_GND
10µF
AD539x
AGND
DV
DV
AGND
VOUT 31
DD
DD
DGND
VOUT 0
0.1µF
DV
DV
VOUT 31
DD
DD
VOUT 0
DGND
0.1µF
DD
= 3 V. On

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