SC1200UCL-266 AMD (ADVANCED MICRO DEVICES), SC1200UCL-266 Datasheet - Page 405

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SC1200UCL-266

Manufacturer Part Number
SC1200UCL-266
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of SC1200UCL-266

Lead Free Status / Rohs Status
Not Compliant

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Electrical Specifications
Notes:
1)
2)
AMD Geode™ SC1200/SC1201 Processor Data Book
IDE_CS[1:0]#
IDE_DATA[15:0]
IDE_DATA[15:0]
IDE_DREQ0
IDE_DACK0#
IDE_IOR0#
IDE_IOW0#
For Multiword DMA transfers, the Device may negate IDE_DREQ[0:1] within the tL specified time once IDE_DACK[0:1
is asserted, and reassert it again at a later time to resume the DMA operation. Alternatively, if the device is able to co
tinue the transfer of data, the device may leave IDE_DREQ[0:1] asserted and wait for the host to reasse
IDE_DACK[0:1]#.
This signal can be negated by the host to Suspend the DMA transfer in process.
Figure 9-27. Multiword DMA Data Transfer Timing Diagram
t
t
M
I
t
E
t
G
t
D
t
G
t
F
t
H
t
K
t
0
t
L
t
N
t
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32579B
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