M48T129V-85PM1 STMicroelectronics, M48T129V-85PM1 Datasheet - Page 11

• Manufacturer Part Number: M48T129V-85PM1
• Description: IC TIMEKPR NVRAM 1MBIT 3V 32-DIP
• Manufacturer: STMicroelectronics
• Series: Timekeeper®r
• Type: Clock/Calendar/NVSRAMr

Specifications of M48T129V-85PM1

• Memory Size: 1M (128K x 8)
• Time Format: HH:MM:SS (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 32-DIP (600 mil) Module
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-2835-5

M48T129V, M48T129Y
2.3
Note:
Table 4.
1. Valid for ambient operating temperature: T
2. C
3. If E goes low simultaneously with W going low, the outputs remain in the high impedance state.
Data retention mode
With valid V
RAM. Should the supply voltage decay, the RAM will automatically deselect, write protecting
itself when V
impedance and all inputs are treated as “Don't care.”
A power failure during a WRITE cycle may corrupt data at the current addressed location,
but does not jeopardize the rest of the RAM's content. At voltages below V
memory will be in a write protected state, provided the V
M48T129Y/V may respond to transient noise spikes on V
window during the time the device is sampling V
supply lines is recommended.
When V
preserving data and powering the clock. The internal energy source will maintain data in the
M48T129Y/V for an accumulated period of at least 10 years at room temperature. As
system power rises above V
switched to external V
further more detailed review of lifetime calculations, please see application note AN1012.
t
t
WHQX
WLQZ
Symbol
noted).
t
t
t
t
t
t
t
t
t
t
t
t
t
WLWH
WHAX
DVWH
WHDX
AVWH
AVWL
EHAX
DVEH
EHDX
AVEH
AVEL
ELEH
AVAV
L
= 5 pF.
(2)(3)
(2)(3)
CC
drops below V
CC
WRITE mode AC characteristics
WRITE cycle time
Address valid to WRITE enable low
Address valid to chip enable low
WRITE enable pulse width
Chip enable low to chip enable high
WRITE enable high to address transition
Chip enable high to address transition
Input valid to WRITE enable high
Input valid to chip enable high
WRITE enable high to input transition
Chip enable high to input transition
WRITE enable low to output Hi-Z
Address valid to WRITE enable high
Address valid to chip enable high
WRITE enable high to output transition
CC
applied, the M48T129Y/V operates as a conventional BYTEWIDE™ static
falls between V
CC
. Deselect continues for t
SO
Parameter
, the control circuit switches power to the internal battery,
SO
, the battery is disconnected, and the power supply is
Doc ID 5710 Rev 4
PFD
(max), V
(1)
A
= 0 to 70 °C; V
PFD
CC
(min) window. All outputs become high
REC
CC
. Therefore, decoupling of the power
= 4.5 to 5.5 V or 3.0 to 3.6 V (except where
after V
Min
70
50
30
30
60
55
10
10
60
M48T129Y
0
0
5
5
5
CC
CC
–70
fall time is not less than t
that cross into the deselect
CC
Max
25
reaches V
Min
85
60
35
35
70
65
15
15
70
M48T129V
0
0
5
5
5
Operating modes
PFD
PFD
–85
(max). For a
(min), the
Max
30
F
. The
Unit
11/28
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns