TC59SM816BFTL-80 Toshiba, TC59SM816BFTL-80 Datasheet - Page 38

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TC59SM816BFTL-80

Manufacturer Part Number
TC59SM816BFTL-80
Description
Manufacturer
Toshiba
Datasheet

Specifications of TC59SM816BFTL-80

Lead Free Status / RoHS Status
Not Compliant
Addressing sequence of Sequential mode
varied by the Burst Length as shown in Table 2.
Addressing sequence of Interleave mode
in the sequence shown in Table 3.
A column access is performed by incrementing the column address input to the device. The address is
A column access is started from the input column address and is performed by inverting the address bits
Table 2. Addressing sequence for Sequential mode
Table 3. Addressing sequence for Interleave mode
Data0
Data1
Data2
Data3
Data4
Data5
Data6
Data7
Data0
Data1
Data2
Data3
Data4
Data5
Data6
Data7
DATA
DATA
A8
A8
A8
A8
A8
A8
A8
A8
Access Address
A7
A7
A7
A7
A7
A7
A7
A7
n + 1
n + 2
n + 3
n + 4
n + 5
n + 6
n + 7
A6
A6
A6
A6
A6
A6
A6
A6
n
Access Address
A5
A5
A5
A5
A5
A5
A5
A5
A4
A4
A4
A4
A4
A4
A4
A4
A3
A3
A3
A3
A3
A3
A3
A3
TC59SM816/08/04BFT/BFTL-70,-75,-80
A2
A2
A2
A2
A
A
A
A
2 words (Address bits is A0)
4 words (Address bits is A1, A0)
8 words (Address bits is A2, A1, A0)
2
2
2
2
not carried from A0 to A1
not carried from A1 to A2
not carried from A2 to A3
A1
A1
A
A
A1
A1
A
A
1
1
1
1
A0
A
A0
A
A0
A
A0
A
0
0
0
0
Burst Length
Burst Length
2 words
4 words
8 words
2001-06-11 38/49

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