TC59SM816BFTL-80 Toshiba, TC59SM816BFTL-80 Datasheet - Page 37

• Manufacturer Part Number: TC59SM816BFTL-80
• Manufacturer: Toshiba

Specifications of TC59SM816BFTL-80

• Lead Free Status / RoHS Status: Not Compliant

7. Mode Register Operation
three fields; A Burst Length field to set the length of burst data, an Addressing Mode selected bits to designate
the column access sequence in a Burst cycle, and a
The data to be set in the Mode Register is transferred using the A0~A12, BS0, BS1 address inputs. The initial
value of the Mode Register after power-up is undefined; therefore the Mode Register Set command must be
issued before proper operation.
•
•
The Mode register designates the operation mode for the Read or Write cycle. This register is divided into
The Mode Register is programmed by the Mode Register Set command when all banks are in the idle state.
Burst Length field (A2~A0)
1, 2, 4, 8, words, or full-page.
Addressing Mode Select (A3)
Sequential mode is selected. When the A3 bit is 1, Interleave mode is selected.
Both Addressing modes support burst length of 1, 2, 4 and 8 words. Additionally, Sequential mode supports
the full-page burst.
This field specifies the data length for column access using the A2~A0 pins and sets the Burst Length to be
The Addressing Mode can be one of two modes; Interleave mode or Sequential mode. When the A3 bit is 0,
A2
A3
0
0
0
0
1
0
1
Addressing Mode
A1
0
0
1
1
1
Sequential
Interleave
A0
0
1
0
1
1
CAS
TC59SM816/08/04BFT/BFTL-70,-75,-80
Latency field to set the access time in clock cycle.
Burst Length
Full-Page
2 words
4 words
8 words
1 word
2001-06-11 37/49