MC9328MX21SVM Freescale, MC9328MX21SVM Datasheet - Page 47
MC9328MX21SVM
Manufacturer Part Number
MC9328MX21SVM
Description
Manufacturer
Freescale
Datasheet
1.MC9328MX21SVM.pdf
(88 pages)
Specifications of MC9328MX21SVM
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9328MX21SVM
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MC9328MX21SVMR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1. All the timings for the SSI are given for a non-inverted serial clock polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
Freescale Semiconductor
Ref
No.
11a
11b
27a
27b
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have been inverted, all the timing remains valid by inverting
the clock signal STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables and in the figures.
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
28
29
30
31
32
33
34
(Tx) CK high to STXD high
(Tx) CK high to STXD low
(Tx) CK high to STXD high impedance
SRXD setup time before (Rx) CK low
SRXD hold time after (Rx) CK low
(Tx/Rx) CK clock period
(Tx/Rx) CK clock high period
(Tx/Rx) CK clock low period
(Tx) CK high to FS (bl) high
(Rx) CK high to FS (bl) high
(Tx) CK high to FS (bl) low
(Rx) CK high to FS (bl) low
(Tx) CK high to FS (wl) high
(Rx) CK high to FS (wl) high
(Tx) CK high to FS (wl) low
(Rx) CK high to FS (wl) low
(Tx) CK high to STXD valid from high impedance
(Tx) CK high to STXD high
(Tx) CK high to STXD low
(Tx) CK high to STXD high impedance
SRXD setup time before (Rx) CK low
SRXD hole time after (Rx) CK low
SRXD setup before (Tx) CK falling
SRXD hold after (Tx) CK falling
SRXD setup before (Tx) CK falling
SRXD hold after (Tx) CK falling
Table 31. SSI to SSI2 Ports Timing Parameters (Continued)
Parameter
1
Synchronous External Clock Operation (SSI2 Ports)
Synchronous Internal Clock Operation (SSI2 Ports)
MC9328MX21S Technical Data, Rev. 1.3
External Clock Operation (SSI2 Ports)
Minimum
21.50
90.91
36.36
36.36
10.40
11.00
10.40
11.00
10.40
11.00
10.40
11.00
20.78
0.34
0.34
0.34
9.59
9.59
9.59
9.59
2.52
4.42
0
0
0
0
1.8 V ± 0.1 V
Maximum
17.37
19.70
17.37
19.70
17.37
19.70
17.37
19.70
17.08
17.08
17.08
16.84
0.72
0.72
0.48
–
–
–
–
–
–
–
–
–
–
–
Minimum
21.50
90.91
36.36
36.36
20.78
0.34
0.34
0.34
8.67
9.28
8.67
9.28
8.67
9.28
8.67
9.28
7.86
7.86
7.86
7.86
2.52
4.42
0
0
0
0
3.0 V ± 0.3 V
Maximum
15.88
18.21
15.88
18.21
15.88
18.21
15.88
18.21
15.59
15.59
15.59
15.35
0.72
0.72
0.48
–
–
–
–
–
–
–
–
–
–
–
Specifications
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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