MC9328MX21SVM Freescale, MC9328MX21SVM Datasheet - Page 19

• Manufacturer Part Number: MC9328MX21SVM
• Manufacturer: Freescale

Specifications of MC9328MX21SVM

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Figure 5
sensing grant signal active such that a new burst is not initiated.
3.8
To use the internal transmit (TX) and receive (RX) data FIFOs when the CSPI1 module is configured as a
master, two control signals are used for data transfer rate control: the SS signal (output) and the SPI_RDY
signal (input). The SPI 1 Sample Period Control Register (PERIODREG1) and the SPI 2 Sample Period
Control Register (PERIODREG2) can also be programmed to a fixed data transfer rate for either CSPI1
or CSPI2. When the CSPI1 module is configured as a slave, the user can configure the SPI 1 Control
Register (CONTROLREG1) to match the external CSPI master’s timing. In this configuration, SS
Freescale Semiconductor
t
max_req_assert
Parameter
t
t
t
min_assert
max_write
max_read
shows the safe maximum time for which External DMA request can be kept asserted, after
External device
External device
Ext_DMAGrant
Data read from
CSPI Timing Diagrams
Data written to
Ext_DMAReq
Ext_DMAGrant
Ext_DMAReq
Minimum assertion time of External Grant
signal
Maximum External request assertion time
after assertion of Grant signal
Maximum External request assertion time
after first read completion
Maximum External request assertion time
after completion of first write
NOTE: Assuming in worst case the data is read/written from/to External device as per the above waveform.
Figure 5. Safe Maximum Timings for External Request De-Assertion
Table 13. DMA External Request and Grant Timing Parameters
Description
Figure 4. Assertion of DMA External Grant Signal
MC9328MX21S Technical Data, Rev. 1.3
9 hclk - 20.66
3 hclk - 15.87
8 hclk - 6.21
8 hclk + 8.6
WCS
t
max_req_assert
3.0 V
8 hclk + 2.74
8 hclk - 0.77
3 hclk - 8.83
9 hclk - 6.7
t
min_assert
t
max_read
BCS
9 hclk - 17.96
8 hclk + 7.17
8 hclk - 5.84
3 hclk - 15.9
WCS
1.8 V
t
max_write
8 hclk + 3.25
9 hclk - 8.16
8 hclk - 0.66
3 hclk - 9.12
BCS
Specifications
Unit
ns
ns
ns
ns
19