MC9328MX21SVM Freescale, MC9328MX21SVM Datasheet - Page 16

• Manufacturer Part Number: MC9328MX21SVM
• Manufacturer: Freescale

Specifications of MC9328MX21SVM

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Specifications
3.5
Parameters of the DPLL are given in
predivider and T
16
Reference clock frequency range
Pre-divider output clock frequency
range
Double clock frequency range
Pre-divider factor (PD)
Total multiplication factor (MF)
MF integer part
MF numerator
MF denominator
Frequency lock-in time after
full reset
Frequency lock-in time after
partial reset
Phase lock-in time after
full reset
Phase lock-in time after
partial reset
Frequency jitter (p-p)
Phase jitter (p-p)
Power dissipation
DPLL Timing Specifications
Parameter
dck
is the output double clock period.
Vcc = 1.5V
Vcc = 1.5V
Vcc = 1.5V
Includes both integer and fractional parts
Should be less than the denominator
FOL mode for non-integer MF
(does not include pre-multi lock-in time)
FOL mode for non-integer MF
(does not include pre-multi lock-in time)
FPL mode and integer MF
(does not include pre-multi lock-in time)
FPL mode and integer MF
(does not include pre-multi lock-in time)
Integer MF, FPL mode, Vcc=1.7V
FOL mode, integer MF,
f
dck
= 560 MHz, Vcc = 1.5V
MC9328MX21S Technical Data, Rev. 1.3
Table
Table 11. DPLL Specifications
Test Conditions
11. In this table, T
–
–
–
–
ref
is a reference clock period after the
Minimum
220
350
220
480
360
16
16
1
5
5
0
1
–
–
–
Typical
0.02
400
280
530
410
1.0
1.5
–
–
–
–
–
–
–
–
Freescale Semiconductor
Maximum
1022
1023
0.03
320
560
450
330
580
460
1.5
32
16
15
15
–
2•T
(Avg)
MHz
MHz
MHz
Unit
mW
T
T
T
T
ns
–
–
–
–
–
ref
ref
ref
ref
dck