ZPSD511B1C15J STMicroelectronics, ZPSD511B1C15J Datasheet - Page 86

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ZPSD511B1C15J

Manufacturer Part Number
ZPSD511B1C15J
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ZPSD511B1C15J

Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Supplier Unconfirmed
Counter/Timer
Registers
(Cont.)
Watch Dog Bit:
Global Mode Bit: When this bit is set to a
Counter Start Bit: When this bit is set to
Scale Bit:
9.6.2.1 Global Command Register
This is used to specify the operation mode of the Counter/Timer and to start or stop the
Counter/Timer. Therefore during the initialization of the Counter/Timer registers, the Global
Command Register should always be configured last.
NOTE:
Bit 7
*
*
At RESET all bits come up as 0’s.
= Not used.
Bit 6
*
When this bit is
0: Watch Dog mode is NOT selected.
1: Watch Dog Counter/Timer (Counter 2) is active. This bit can be
NOTE: Whenever this bit is set to 1, the COUNTER START bit should
also be set to 1. Otherwise the Counter/Timer will always be off,
i.e., once this bit is set, access to Counter 2 Registers and the Global
Command Registers are blocked.
0: All Timers/Counters are set to Waveform or Pulse Mode.
1: All Timers/Counters are set to operate in Event Counter or Time
NOTE: Further selection of modes is done in individual CMD registers.
0: ALL CTUs are disabled and can be re-initialized.
1: ALL CTUs are enabled.
When this bit is set to
0: The clock to all Counter/Timers is divided by 1.
1: The clock to all Counter/Timers is divided by 8.
turned off by RESET only.
Capture Mode.
Bit 5
*
Bit 4
*
Watch
Dog
Bit 3
Global
Mode
Bit 2
Counter
Start
Bit 1
PSD5XX Family
Scale
Bit 0
83

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