ZPSD511B1C15J STMicroelectronics, ZPSD511B1C15J Datasheet - Page 85

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ZPSD511B1C15J

Manufacturer Part Number
ZPSD511B1C15J
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ZPSD511B1C15J

Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Supplier Unconfirmed
Counter/Timer
Registers
(Cont.)
82
PSD5XX Family
Table 23a. Offset Address Map of Counter/Timer-Unit Registers
(For 16-Bit Motorola MCUs in 16-Bit Mode. If 8-Bit Mode is selected, use Table 23.)
Registers IMG0 through IMG3 are written to by the microcontroller to load the
Counter/Timers with required values in Waveform, Pulse and WatchDog mode only.
To retrieve the count or time in Event count or Time capture modes, Counter/Timers store
their values into IMG0 through IMG3.
Any access to the Image Registers must conform to the Freeze/Freeze Acknowledge
protocol, described later in the Freeze Command paragraph.
Address
Offset
+9Ch
+A8h
+A4h
+A2h
+A0h
+9Eh
+9Ah
+98h
+96h
+94h
+92h
+90h
STATUS FLAGS
SOFTWARE LOAD/STORE
CMD3
CMD1
CNTR3
CNTR2
CNTR1
CNTR0
IMG3
IMG2
IMG1
IMG0
Register Name
Address
Offset
+9Dh
+A9h
+A7h
+A5h
+A3h
+A1h
+9Fh
+9Bh
+99h
+97h
+95h
+93h
+91h
GLOBAL COMMAND
DLCY
FREEZE COMMAND
CMD2
CMD0
CNTR3
CNTR2
CNTR1
CNTR0
IMG3
IMG2
IMG1
IMG0
Register Name

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