ZPSD511B1C15J STMicroelectronics, ZPSD511B1C15J Datasheet - Page 57

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ZPSD511B1C15J

Manufacturer Part Number
ZPSD511B1C15J
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ZPSD511B1C15J

Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Supplier Unconfirmed
Memory
Block
(Cont.)
54
PSD5XX Family
Table 16. VM Register
9.4.4 Memory Select Map For 8031 Application
The 8031 family of microcontrollers has separate code memory space and data memory
space. This feature requires a different Memory Select Map. Two modes of operation are
provided for 8031 applications. The selection of the modes is specified in the PSD5XX
PSDsoft Software (PSDconfiguration):
If data and code memory blocks must overlap each other, the RD signal can be included as
an additional address input in generating the EPROM chip select signals (ES0 – ES3). In
this case the EPROM access time is from the RD valid to data valid. Figures 27a and 27b
show the memory configuration in the two modes.
In some applications it is desirable to execute program codes in SRAM. The PSD5XX
provides this option by enabling PSEN to access SRAM. To activate this option, the
SRCODE bit of the VM Register must be set to “1” (see Table 16). SRAM space can
overlap EPROM space and has priority when PSEN is used.
*
= Reserved for future use, bits set to zero.
Separate Space Mode
In this mode, the PSEN signal is used to access code from EPROM, and the RD signal
is used to access data from SRAM. The code memory space is separated from the data
memory space.
Combined Space Mode
In this mode, the EPROM can be accessed by PSEN or RD. The EPROM is used for
code and data storage. The memory block's address space cannot overlap.
Bit 7
*
Bit 6
*
Bit 5
*
Bit 4
*
Bit 3
*
Bit 2
*
SRCODE
1 = ON
Bit 1
1 = ON
Bit 0
PIO

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