PLRXPL-VI-S24-22 JDS UNIPHASE, PLRXPL-VI-S24-22 Datasheet - Page 5

• Manufacturer Part Number: PLRXPL-VI-S24-22
• Manufacturer: JDS UNIPHASE

Specifications of PLRXPL-VI-S24-22

• Optical Fiber Type: TX/RX
• Optical Rise Time: 0.15/0.2ns
• Optical Fall Time: 0.15/0.2ns
• Operating Temperature Classification: Industrial
• Peak Wavelength: 850nm
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Lead Free Status / RoHS Status: Compliant

Notes




* Transmission lines should be 100 differential traces. It is recommended that the termination resistor for the PECL Receiver (R3 + R4) be placed beyond the input pins of the
PECL Receiver. Series Source Termination Resistors on the PECL Driver (R1+R2) should be placed as close to the driver output pins as possible
5
Open Collector Driver
Receiver (Tx Fault)
Power supply fi ltering components should be placed as close to the V
(Mod_Def(0))
Receiver (LOS)
PECL driver and receiver will require biasing networks. Please consult application notes from suppliers of these components. CML I/O on the PHY are supported.
Open Collector
Open Collector
Rate Select
(Tx Disable)
(Mod_Def(2))
(Mod_Def(1))
Bidirectional
Bidirectional
MOD_DEF(2) and MOD_DEF(1) should be bi-directional open collector connections in order to implement serial ID (MOD_DEF[0,1,2]) PLRXPL-VI-S24-22 transceiver.
Receiver
R1 and R2 may be included in the output of the PHY. Check application notes of the IC in use.
Figure 2
10 k?
10 kΩ
10 kΩ
10 kΩ
10 kΩ
Vcc
Vcc
Vcc
Vcc
Vcc
Recommended application schematic for the PLRXPL-VI-S24-22 transceiver
10 VeeR
1 VeeT
2 Tx Fault
3 Tx Disable
7 Rate Select
4 MOD_DEF(2)
5 MOD_DEF(1)
6 MOD_DEF(0)
8 LOS
9 VeeR
Section 2
Recommended connections to the PLRXPL-VI-S24-22 transceiver are shown in
fi gure 2 below.
ROHS-COMPLIANT 2.125, 1.25 AND 1.063 GBPS 850 NM TRANSCEIVER
cc
pins of the host connector as possible for optimal performance.
VeeT 20
VeeT 17
VccT 16
VccR 15
VeeR 14
RD+ 13
VeeR 11
TD- 19
TD+ 18
RD- 12
Application Schematics
0.1μF
0.1 μF
C3
C4
Z
*
= 100Ω
Z
*
= 100Ω
10 μF
C5
1 μH
1 μH
L1
L2
R1
R2
*
*
50Ω
50Ω
50Ω
50Ω
R3
R4
*
*
0.1 μF
C2
PECL Receiver
(RX DATA)
PECL Driver
(TX DATA)
Vcc +3.3V Input
10μF
C1