MT45W2MW16BGB-701 IT Micron Technology Inc, MT45W2MW16BGB-701 IT Datasheet - Page 39

• Manufacturer Part Number: MT45W2MW16BGB-701 IT
• Manufacturer: Micron Technology Inc

Specifications of MT45W2MW16BGB-701 IT

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

Table 15:
Figure 28:
Table 16:
PDF: 09005aef82832fa2/Source: 09005aef82832f5f
32mb_burst_cr1_0_p24z_2.fm - Rev. E 9/08 EN
Parameter
CE# HIGH between subsequent burst and
mixed-mode operations
Maximum CE# pulse width
CE# LOW to WAIT valid
Clock period
CE# setup to CLK active edge
Hold time from active CLK edge
Chip disable to WAIT High-Z output
CLK rise or fall time
Clock to WAIT valid
CLK HIGH or LOW time
Setup time to active CLK edge
Burst WRITE Cycle Timing Requirements
Initialization Timing Parameters
Initialization Period
Note:
Parameter
Initialization period
(required before normal operations)
Vcc, VccQ = 1.7V
When configured for synchronous mode (BCR[15] = 0), a refresh opportunity must be pro-
vided every
tions: clocked CE# HIGH or CE# HIGH for greater than 15ns.
32Mb: 2 Meg x 16 Async/Page/Burst CellularRAM 1.0 Memory
t
CEM. A refresh opportunity is satisfied by either of the following two condi-
Symbol
t
t
t
t
t
CBPH
KHKL
KHTL
t
t
CEM
CEW
t
t
t
CLK
CSP
t
HD
HZ
KP
SP
39
Min
9.62
5
1
3
2
3
3
–
–
–
–
104 MHz
t PU
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Symbol
Max
7.5
1.6
t
PU
8
8
7
–
–
–
–
–
–
Min
12.5
4.5
5
1
2
4
3
–
–
–
–
normal operation
Min
80 MHz
150
Device ready for
Vcc (MIN)
Timing Requirements
Max
-70
7.5
1.8
©2007 Micron Technology, Inc. All rights reserved.
–
8
–
–
–
8
9
–
–
Max
–
Units
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
Notes
µs
1
1