CY7C4251-15JCT Cypress Semiconductor Corp, CY7C4251-15JCT Datasheet - Page 14

• Manufacturer Part Number: CY7C4251-15JCT
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C4251-15JCT

• Configuration: Dual
• Density: 64Kb
• Access Time (max): 15ns
• Word Size: 9b
• Organization: 8Kx9
• Sync/async: Synchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: PLCC
• Clock Freq (max): 40MHz
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Supply Current: 35mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Not Compliant

Document #: 38-06016 Rev. *D
Notes
(if applicable)
21. t
22. PAE offset = n.
23. If a read is performed on this rising edge of the read clock, there are Empty + (n – 1) words in the FIFO when PAE goes LOW.
(if applicable)
and the rising RCLK is less than t
WEN2
SKEW2
WEN2
Q
D
WCLK
WEN1
REN1,
WCLK
RCLK
WEN1
REN1,
REN2
RCLK
0
0
REN2
PAE
–Q
–D
OE
FF
is the minimum time between a rising WCLK and a rising RCLK edge for PAE to change state during that clock cycle. If the time between the edge of WCLK
8
8
DATA IN OUTPUT REGISTER
t
t
LOW
SKEW1
CLKH
[14]
t
ENS
NO Write
SKEW2
t
SKEW2
, then PAE may not change state until the next RCLK.
Figure 11. Programmable Almost Empty Flag Timing
t
WFF
t
t
A
ENH
t
t
ENS
ENS
[21]
t
t
ENH
ENH
t
CLKL
NO Write
Figure 10. Full Flag Timing
t
DS
t
PAE
Note
22
DATA Write
DATA Read
t
ENS
t
t
WFF
SKEW1
[14]
N + 1 WORDS
t
ENS
INFIFO
t
ENS
CY7C4421/4201/4211/4221
NO Write
t
ENH
CY7C4231/4241/4251
t
WFF
t
t
A
ENH
Note
23
NEXT DATA Read
DATA Write
t
PAE
Page 14 of 20
[+] Feedback