AD9937KCPRL Analog Devices Inc, AD9937KCPRL Datasheet - Page 31

• Manufacturer Part Number: AD9937KCPRL
• Manufacturer: Analog Devices Inc

Specifications of AD9937KCPRL

• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Input Voltage Range: 0.5V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 10b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -25C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 56
• Package Type: LFCSP EP
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Not Compliant

Controlling LM Pulse Timing
The AD9937 provides an LM output pulse that is fully program-
mable by using the registers in Table XV. Two unique sets of LM
pulses can be preprogrammed using the LMLENx, LMTOG1_x,
and LMTOG2_x (x = 0, 1) registers. Once these pulses are
preprogrammed, they can be individually selected to be output
in any of the five CCD regions by using the LMPATSELn
register (n = 0, 1, 2, 3, 4). The number of repetitions can also be
individually programmed for each CCD region by using the
LMREPn register (n = 0, 1, 2, 3, 4).
The 12-bit H counter and 8-bit LM counters are used for con-
figuring the LM pulse. The 8-bit LM counter resets to 0 when
Register Name
LM_INVERT
LMSTART0*
LMSTART1*
LMLEN0
LMTOG1_0
LMTOG2_0
LMLEN1
LMTOG1_1
LMTOG2_1
LMPATSEL0
LMREP0
LMPATSEL1
LMREP1
LMPATSEL2
LMREP2
LMPATSEL3
LMREP3
LMPATSEL4
LMREP4
*LMSTART0 and LMSTART1 reference the 12-bit HD counter.
REV. 0
Length
(Bits)
1
12
12
8
8
8
8
8
8
1
2
1
2
1
2
1
2
1
2
Register
Type
Control 0x04
Mode_Reg(13)
Mode_Reg(13)
HLM_Reg(8)
HLM_Reg(8)
HLM_Reg(8)
HLM_Reg(9)
HLM_Reg(9)
HLM_Reg(9)
Mode_Reg(15)
Mode_Reg(15)
Mode_Reg(16)
Mode_Reg(16)
Mode_Reg(17)
Mode_Reg(17)
Mode_Reg(18)
Mode_Reg(18)
Mode_Reg(19)
Mode_Reg(19)
High/Low
High/Low
High/Low
High/Low
High/Low
Range
High/Low
0–4095 Pixels
0–4095 Pixels
0–255 Pixels
0–255 Pixels
0–255 Pixels
0–255 Pixels
0–255 Pixels
0–255 Pixels
0–3 LM Repetitions
0–3 LM Repetitions
0–3 LM Repetitions
0–3 LM Repetitions
0–3 LM Repetitions
Table XV. LM Registers
–31–
the 12-bit H counter resets to 0 set by the HDLEN register.
The LMSTART0 and LMSTART1 positions reference the 12-
bit H counter value zero. The 8-bit LM counter begins counting
when LMSTART0 is reached; it counts up to the value set in
the LMLENx register, as shown in Figure 26. The LM pulse
toggle positions reference the 8-bit LM counter.
Figures 26 and 27 provide examples of programming the LM
pulses. Figure 26 shows an example when LMSTART1 is less
than HDLEN. In this case, multiple sets of LM pulses can be
output between the HDLEN lengths. The number of sets is
determined by the value of HDLEN and LMSTART1. Figure 27
shows that only one set of LM pulses will be output when
LMSTART1 is greater than HDLEN.
LM Inversion Control (1 = Invert Programmed LM)
LM Counter Start Position 1
LM Counter Start Position 2
LM Counter Length for LM0
LM0 Toggle Position 1
LM0 Toggle Position 2
LM Counter Length for LM1
LM1 Toggle Position 1
LM1 Toggle Position 2
Selects CCD Region 0 LM Pattern (0 = LM0, 1 = LM1)
LM Repetition Number in CCD Region 0
Selects CCD Region 1 LM Pattern (0 = LM0, 1 = LM1)
LM Repetition Number in CCD Region 1
Selects CCD Region 2 LM Pattern (0 = LM0, 1 = LM1)
LM Repetition Number in CCD Region 2
Selects CCD Region 3 LM Pattern (0 = LM0, 1 = LM1)
LM Repetition Number in CCD Region 3
Selects CCD Region 4 LM Pattern (0 = LM0, 1 = LM1)
LM Repetition Number in CCD Region 4
Description
AD9937