FAGD16556ECLBA Intel, FAGD16556ECLBA Datasheet - Page 4

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FAGD16556ECLBA

Manufacturer Part Number
FAGD16556ECLBA
Description
Manufacturer
Intel
Datasheet

Specifications of FAGD16556ECLBA

Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / RoHS Status
Not Compliant
Practical Considerations
The PCB Layout
The PCB must be designed with shortest
possible conductors for the data inter-
faces and clock distribution. Design
these connections as transmission lines.
The LVTTL compatible select pins are
supplied with an on-chip pull-up resistor
(Figure 4)
connected.
The LVDS connection scheme is shown
on
impendance of 100 W and do not require
external termination resistors.
LVPECL connection schemes are shown
on
The high-speed CML type input buffers
are supplied with on-chip termination re-
sistors as shown on
The heatsink on the TQFP EDQUAD
package should be connected to a VEE
power supply plane on the PCB with ca-
pability to carry away the dissipated heat.
Noise Considerations
When designing the PCB utmost impor-
tance should be put on noise isolation.
De-coupling capacitors should be applied
to each supply pin. Care should be taken
to reduce ground bounces. Be aware
that any noise added to the VCXO output
signal translates directly into jitter on the
high-speed output clock. Hence, the
VCXO(s) should be differential and lo-
cated close to the transmit device.
Figure 4. LVTTL pull-up resistor
Data Sheet Rev.: 23
Figure
Figures 6
5. The LVDS I/Os have an
given a default “1" when not
and
VDD
VEE
7
16kW
.
Figure 9.
LVTTL
Figure 5. LVDS connection
Figure 6. LVPECL output termination, AC-coupled.
Figure 7. LVPECL output termination, DC-coupled.
Figure 8. CML output buffer
VDD
20mA
LVPECL
50W
LVPECL
LVDS
2 x
GD16556/GD16557*
Output
Output
Output
50 Line
W
180W
(VEE)
VDD
0V
50W
2 x
180W
100nF
100nF
CML
50W
50W
Figure 9. CML input buffer
Termination
50W
150W
150W
150W
Negative
Positive
Input
Input
(VDD -1.3V)
VEE
VEE
2V
50W
Input
50W
2 ×
Input
Input
LVPECL
LVPECL
LVDS
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