FAGD16556ECLBA Intel, FAGD16556ECLBA Datasheet
FAGD16556ECLBA
Specifications of FAGD16556ECLBA
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FAGD16556ECLBA Summary of contents
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... Intel company General Description The GD16556 and GD16557 constitute a high performance multi-bitrate tran- sponder chip set designed for Optical Network applications. The devices are available with either LVDS or LVPECL low-speed I/Os. The chip set is compatible with the line rates: SDH STM-1 / SONET OC3 ...
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Functional Details General The transmitter and receiver chip set is optimised for transponder solutions and Optical Network interconnects such as bridges and gateways. The intended transponder system is shown on page 1. Transponder System Jitter Specifications The transponder system exceeds ...
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The core circuit is illustrated on Figure 2 For simplicity the system ASIC and con- nections to this device have been omit- ted. Also, the PLLs have been somewhat simplified omitting ...
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Practical Considerations The PCB Layout The PCB must be designed with shortest possible conductors for the data inter- faces and clock distribution. Design these connections as transmission lines. The LVTTL compatible select pins are supplied with an on-chip pull-up resistor ...
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The Receiver – GD16556 General The GD16556 is an on-the-fly program- mable multi-bitrate CDR and 1:16 de- multiplexer with emphasis put on tran- sponder applications. The device is ca- pable of demultiplexing a serial bit stream at 155 Mbit/s, 622 ...
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Assume the incoming line rate equals 32/31 times 2.488 Gbit/s. Thus, the VCO frequency should equal 2.568 GHz. The reference clock input (CKREF, CKREFN) is defined as 2.488 GHz/62 equal to 40.134 MHz. Now the VCO frequency is divided by ...
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This has been realised by counting the false bit transitions. If this counter runs out within a time period the BEF flag is set. The length of the counter may be set by external select signals (SBER0 and SBER1). The ...
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The Transmitter – GD16557 General The GD16557 is an on-the-fly program- mable multi-bitrate multiplexer with em- phasis put on transponder applications. The device is capable of multiplexing 16 independent low speed channels into one serial bit stream at 155 Mbit/s, ...
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Forward Clocking Scheme GD16557 has been designed as a re- verse clocked MUX. Typically this is a sound way to use the device in a tran- sponder system, because of the rela- tively long (6400 ps) bit period at the ...
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Supply GD16557 VDD 2 x 50W DO 50 Line DON GND 20mA Figure 16.GD16557/GD16578 DC-connection +3.3V Supply GD16557 VDD 2 x 50W DO 100nF 50 Line DON 20mA Figure 17.GD16557/GD16578 AC-connection High-speed Clock and Data Outputs The high-speed clock ...
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Lock Detect Each PLL is equipped with a LVTTL lock detect output that signals whether or not the PLL is locked. A logic “1" indicates no lock and a logic ”0" indicates in lock. The pins LOCK1 and LOCK2 should ...
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Standard Bit Rate “Wrap” fraction STM None. STM Only standard bit STM- rates available. GE STM Standard bit rates STM with programmable STM- ...
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Standard Bit Rate “Wrap” fraction STM STM 32/31 on receiving side STM- STM STM 32/31 on transmit- ting side STM- ...
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Pin List GD16556 - Receiver (continued on next page) Mnemonic: Pin No.: DI, DIN 16, 14 DIREF, DIREFN 17, 13 BP, BPN 8, 7 BPEN 20 LB, LBN 69, 70 LBCK, LBCKN 71, 72 LBEN 6 RSEL1, RSEL2 90, 91 ...
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Mnemonic: Pin No.: CKREFB, CKREFBN 81, 80 CKRSEL 83 CDRSEL 73 TCK 95 SELTCK 94 LD_SEL 23 SBER0, SBER1 21, 22 LOCK 79 BC_DET 28 LOS_DET 29 LOCKDET 30 FCK, FCKN 77, 76 VCTL 99 OUCHP 92 VDD 2, 9, ...
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Package Pinout - GD16556 VDDV 1 VDD 2 VEE 3 MSEL1 4 MSEL2 5 LBEN 6 BPN VDD 9 VDDL 10 VDDL VEEL 12 DIREFN 13 DIN 14 VEEL DIREF 17 VDD 18 VEE ...
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Pin List GD16557 - Transmitter (continued on next page) Mnemonic: Pin no.: DI0 DI0N 34, 35 DI1 DI1N 36, 37 DI2 DI2N 38, 39 DI3 DI3N 40, 41 DI4 DI4N 42, 43 44, 45 DI5 DI5N DI6 DI6N 46, 47 ...
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Mnemonic: Pin no.: VCTL 99 VCXOCHAP 89 VCOCHAP 98 DO, DON 13, 15 CKO, CKON 11, 9 CNTCK, CNTCKN 31, 32 RECCK, RECCKN 71, 70 MSEL1, MSEL2 81, 80 CKTST 96 TSTMODE 95 LOCK1, LOCK2 91, 93 LOCK1A, LOCK2A 90, ...
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Package Pinout - GD16557 VEEA 1 BPEN 2 VEE 3 PHA1 4 PHA2 5 RSEL1 6 RSEL2 7 VDD 8 CKON 9 VDD 10 CKO 11 VEE VDD 14 DON 15 VEE VCMLT1 18 ...
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Maximum Ratings These are the limits beyond which the component may be damaged. All voltages in the table refer to V EE. All output signal currents in the table are defined positive out of the pin. Symbol: Characteristic ...
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DC Chararacteristics °C to +75 °C (For /ECL version T CASE All voltages in the table are referred to V All input signal and power currents in the table are defined positive into the pin. All output ...
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Note 3: All LVTTL inputs are provided with an internal pull-up resistor R when not connected. Note 4: Under the condition of typical supply voltage (3.3 V). Note 5: The LVDS input is LVPECL compatible. Note 6: Assuming a pure ...
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AC Characteristics - General °C to +75 °C (For /ECL version T CASE Symbol: Characteristic: t LVDS rise time LVDS R, t LVDS fall time LVDS F, t LVPECL rise time LVPECL R, t LVPECL fall time ...
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AC Characteristics - GD16556 °C to +75 °C (For /ECL version T CASE DOx CKO Figure 25.Low-speed Output Timing. LB LBN LBCK LBCKN Figure 26.Loop-back Timing. Symbol: Characteristic: J Jitter transfer TRANSFER J Jitter transfer TRAN. Loop-back ...
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UI 0.1 0.0 2M Figure 27.Jitter Transfer Data Sheet Rev ITU-T Specs. 1.5 20dB/dec. 0.4 0.15 F 20M Figure 28.Jitter Tolerance with 2 dB Power Penalty @ BER = 1E-10 GD16556/GD16557* ITU-T Specs. F 100k 1M Page 25 ...
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AC Characteristics - GD16557 °C to +75 °C (For /ECL version T CASE CNTCK CNTCK PHA1,2 = 1,1 DIxx PHA1,2 = 0,0 DIxx PHA1,2 = 1,0 DIxx PHA1,2 = 0,1 ...
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Package Outline Figure 32.100 pin TQFP-EDQUAD. All dimensions are in mm. Device Marking GD16556/<Option> <Design ID> <Wafer ID>-<Wafer Lot#> <Assembly Lot#>-<YYWW> <FPO #> Pin 1 - Mark Figure 33.Device marking. Top view. Data Sheet Rev.: 23 GD16557/<Option> <Design ID> <Wafer ...
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... To order, please specify as shown below. Product Name: Description: GD16556-100BA Receiver with LVDS I/O GD16556/ECL-100BA Receiver with LVPECL I/O GD16557-100BA Transmitter with LVDS I/O GD16557/ECL-100BA Transmitter with LVPECL I/O an Intel company Mileparken 22, DK-2740 Skovlunde Denmark Phone : +45 7010 1062 Fax : +45 7010 1063 E-mail : giga.support.@intel.com Web site : http://developer ...