82P2821BH IDT, Integrated Device Technology Inc, 82P2821BH Datasheet - Page 88

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82P2821BH

Manufacturer Part Number
82P2821BH
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82P2821BH

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
RJA - Receive Jitter Attenuation Configuration Register
Address: 003H, 043H, 083H, 0C3H, 103H, 143H, 183H, 1C3H, (CH1~CH8)
Type: Read / Write
Default Value: 00H
Programming Information
IDT82P2821
7 - 5
2 - 1
Bit
4
3
0
203H, 243H, 283H, 2C3H, 303H, 343H, 383H, 3C3H, (CH9~CH16)
403H, 443H, 483H, 4C3H, 503H, (CH17~CH21)
7C3H (CH0)
7
-
RJA_DP[1:0]
RJA_LIMT
RJA_BW
RJA_EN
Name
-
6
-
Reserved.
This bit determines whether the JA-Limit function is enabled in the RJA.
0: Disable. (default)
1: Enable. The speed of the RJA outgoing data will be adjusted automatically if the FIFO in the RJA is 2-bit close to its full or
emptiness.
This bit controls whether the RJA is enabled to use.
0: Disable. (default)
1: Enable.
These bits select the depth of the RJA FIFO.
00: 128-bit. (default)
01: 64-bit.
1X: 32-bit.
This bit selects the Corner Frequency for the RJA.
0: 5 Hz (in T1/J1 mode) / 6.77 Hz (in E1 mode). (default)
1: 1.26 Hz (in T1/J1 mode) / 0.87 Hz (in E1 mode).
5
-
RJA_LIMT
4
21(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
88
RJA_EN
3
Description
RJA_DP1
2
RJA_DP0
1
February 6, 2009
RJA_BW
0

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