82P2821BH IDT, Integrated Device Technology Inc, 82P2821BH Datasheet - Page 29

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82P2821BH

Manufacturer Part Number
82P2821BH
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82P2821BH

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
3
3.1
globally or on a per-channel basis. The configuration is determined by
the TEHWE pin, the TEHW pin and the T1E1 bit (b0, CHCF,...). Refer to
Table-1 for details of the operation mode selection.
3.2
3.2.1
Receive Single Ended mode, as selected by the R_SING bit (b3,
RCF0,...). In Receive Differential mode, both RTIPn and RRINGn are
used to receive signal from the line side. In Receive Single Ended mode,
only RTIPn is used to receive signal.
with T1 100 Ω, J1 110 Ω or E1 120 Ω twisted pair cable or E1 75 Ω
coaxial cable. In Receiver Single Ended mode, the line interface can
only be connected with 75 Ω coaxial cable.
ance matching or external impedance matching for each channel in
different applications.
3.2.1.1 Receive Differential Mode
supported: Fully Internal Impedance Matching, Partially Internal Imped-
ance Matching and External Impedance Matching. Figure-7 shows an
overview of how these Impedance Matching modes are switched.
mable resistor (IM) only and does not use an external resistor. This
configuration saves external components and supports 1:1 Hitless
Protection Switching (HPS) applications without relays. Refer to
Section 4.4 Hitless Protection Switching (HPS) Summary.
programmable resistor (IM) and a value-fixed 120 Ω external resistor
(Rr). Compared with Fully Internal Impedance Matching, this configura-
tion provides considerable savings in power dissipation of the device.
For example, In E1 120 Ω PRBS mode, the power savings would be
0.57 W. For power savings in other modes, please refer to Chapter 8
Table-1 Operation Mode Selection
Functional Description
IDT82P2821
The IDT82P2821 can be configured to T1/J1 mode or E1 mode
The receive line interface supports Receive Differential mode and
In Receive Differential mode, the line interface can be connected
The receive impedance matching is realized by using internal imped-
In Receive Differential mode, three kinds of impedance matching are
Fully Internal Impedance Matching circuit uses an internal program-
Partially Internal Impedance Matching circuit consists of an internal
FUNCTIONAL DESCRIPTION
T1 / E1 / J1 MODE SELECTION
RECEIVE PATH
R
Operation Mode
X
TEHWE Pin
TERMINATION
TEHW Pin
T1E1 Bit
(The configuration of this bit is ignored).
Open
T1/J1
Global Programming
Open
21(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
29
Low
E1
Physical And Electrical Specifications.
only.
Protection Switch (HPS) hot-switchover, RTIPn/RRINGn must be forced
to enter high impedance state (i.e., External Impedance Matching). For
hot-swap, RTIPn/RRINGn must be always held in high impedance state
during /after power up; for HPS hot-switchover, RTIPn/RRINGn must
enter high impedance state immediately after switchover. Though each
channel can be individually configured to External Impedance Matching
through register access, it is too slow for hitless switch. Therefore, a
hardware pin - RIM - is provided to globally control the high impedance
for all 22 receivers.
Figure-7 Switch between Impedance Matching Modes
External Impedance Matching circuit uses an external resistor (Rr)
To support some particular applications, such as hot-swap or Hitless
RRING
RTIP
Rr = 120 Ω
R120IN
RIM
(The configuration of this pin is ignored)
1 0
T1/J1
0
Per-Channel Programming
1 0
0
IM
RIN
1
R_TERM[1:0]
R_TERM2
Low
February 6, 2009
E1
Receive
1
path

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