82P2821BH IDT, Integrated Device Technology Inc, 82P2821BH Datasheet - Page 112

• Manufacturer Part Number: 82P2821BH
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2821BH

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

INTS0 - Interrupt Status Register 0
Address: 020H, 060H, 0A0H, 0E0H, 120H, 160H, 1A0H, 1E0H, (CH1~CH8)
Type: Read / Write
Default Value: 00H
Programming Information
IDT82P2821
Bit
DAC_IS
7
6
5
4
3
2
1
0
220H, 260H, 2A0H, 2E0H, 320H, 360H, 3A0H, 3E0H, (CH9~CH16)
420H, 460H, 4A0H, 4E0H, 520H, (CH17~CH21)
7E0H (CH0)
7
TCKLOS_IS
SLOS_IS
TLOS_IS
LLOS_IS
DAC_IS
TOC_IS
RJA_IS
TJA_IS
Name
TJA_IS
6
This bit indicates the interrupt status of the waveform amplitude overflow.
0: No waveform amplitude overflow interrupt is generated; or a ‘1’ is written to this bit. (default)
1: Waveform amplitude overflow interrupt is generated and is reported by the INT pin.
This bit indicates the interrupt status of the TJA FIFO overflow or underflow.
0: No TJA FIFO overflow or underflow interrupt is generated; or a ‘1’ is written to this bit. (default)
1: TJA FIFO overflow or underflow interrupt is generated and is reported by the INT pin.
This bit indicates the interrupt status of the RJA FIFO overflow or underflow.
0: No RJA FIFO overflow or underflow interrupt is generated; or a ‘1’ is written to this bit. (default)
1: RJA FIFO overflow or underflow interrupt is generated and is reported by the INT pin.
This bit indicates the interrupt status of the Line Driver TOC.
0: No TOC interrupt is generated; or a ‘1’ is written to this bit. (default)
1: TOC interrupt is generated and is reported by the INT pin. When the TOC_IES bit (b4, INTES,...) is ‘0’, a transition from ‘0’ to
‘1’ on the TOC_S bit (b4, STAT0,...) set this bit to ‘1’; when the TOC_IES bit (b4, INTES,...) is ‘1’, any transition (from ‘0’ to ‘1’ or
from ‘1’ to ‘0’) on the TOC_S bit (b4, STAT0,...) set this bit to ‘1’.
This bit indicates the interrupt status of the TCLKn missing.
0: No TCLKn missing interrupt is generated; or a ‘1’ is written to this bit. (default)
1: TCLKn missing interrupt is generated and is reported by the INT pin. When the TCKLOS_IES bit (b3, INTES,...) is ‘0’, a transi-
tion from ‘0’ to ‘1’ on the TCKLOS_S bit (b3, STAT0,...) set this bit to ‘1’; when the TCKLOS_IES bit (b3, INTES,...) is ‘1’, any tran-
sition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the TCKLOS_S bit (b3, STAT0,...) set this bit to ‘1’.
This bit indicates the interrupt status of TLOS.
0: No TLOS interrupt is generated; or a ‘1’ is written to this bit. (default)
1: TLOS interrupt is generated and is reported by the INT pin. When the TLOS_IES bit (b2, INTES,...) is ‘0’, a transition from ‘0’
to ‘1’ on the TLOS_S bit (b2, STAT0,...) set this bit to ‘1’; when the TLOS_IES bit (b2, INTES,...) is ‘1’, any transition (from ‘0’ to
‘1’ or from ‘1’ to ‘0’) on the TLOS_S bit (b2, STAT0,...) set this bit to ‘1’.
This bit indicates the interrupt status of the SLOS.
0: No SLOS interrupt is generated; or a ‘1’ is written to this bit. (default)
1: SLOS interrupt is generated and is reported by the INT pin. When the LOS_IES bit (b1, INTES,...) is ‘0’, a transition from ‘0’ to
‘1’ on the SLOS_S bit (b1, STAT0,...) set this bit to ‘1’; when the LOS_IES bit (b1, INTES,...) is ‘1’, any transition (from ‘0’ to ‘1’ or
from ‘1’ to ‘0’) on the SLOS_S bit (b1, STAT0,...) set this bit to ‘1’.
This bit indicates the interrupt status of the LLOS.
0: No LLOS interrupt is generated; or a ‘1’ is written to this bit. (default)
1: LLOS interrupt is generated and is reported by the INT pin. When the LOS_IES bit (b1, INTES,...) is ‘0’, a transition from ‘0’ to
‘1’ on the LLOS_S bit (b0, STAT0,...) set this bit to ‘1’; when the LOS_IES bit (b1, INTES,...) is ‘1’, any transition (from ‘0’ to ‘1’ or
from ‘1’ to ‘0’) on the LLOS_S bit (b0, STAT0,...) set this bit to ‘1’.
RJA_IS
5
TOC_IS
4
21(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
112
TCKLOS_IS
3
Description
TLOS_IS
2
SLOS_IS
1
February 6, 2009
LLOS_IS
0