82V2042EPF8 IDT, Integrated Device Technology Inc, 82V2042EPF8 Datasheet - Page 24

• Manufacturer Part Number: 82V2042EPF8
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V2042EPF8

• Screening Level: Industrial
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

3.4
Gain, Amplitude/Wave Shape Detector, Digital Tuning Controller, Adaptive
Equalizer, Data Slicer, CDR (Clock & Data Recovery), Optional Jitter Atten-
uator, Decoder and LOS/AIS Detector. Refer to Figure-7.
3.4.1
matching circuit or the external impedance matching circuit. If R_TERM[2]
Table-11 Impedance Matching for Receiver
FUNCTIONAL DESCRIPTION
IDT82V2042E
The receive path consists of Receive Internal Termination, Monitor
The impedance matching can be realized by the internal impedance
RRING
RTIP
RECEIVE PATH
RECEIVE INTERNAL TERMINATION
Cable Configuration
Note:
1. Common decoupling capacitor. One per chip
2. Cp 0-560 (pF)
3. D1 - D8, Motorola - MBR0540T1; International Rectifier - 11DQ04 or 10BQ060
4. R
T
/ R
E1/120 Ω
E1/75 Ω
termination
R
Receive
T1
Internal
J1
: refer toTable-10 and Table-11 respecivley for R
R
X
T
Line
X
Line
A
B
•
•
2:1
Figure-7 Receive Path Function Block Diagram
1:1
Adaptive Equalizer
•
•
Monitor Gain/
Figure-8 Transmit/Receive Line Circuit
Cp
2
R_TERM[2:0]
R
R
4
Internal Termination
000
001
010
011
•
•
R
R
T
T
VDDRn
4
4
D6
D5
•
T
·
VDDTn
VDDTn
and R
VDDRn
D2
D1
D8
D7
D4
D3
3
•
R
Data Slicer
•
·
·
·
•
values
DUAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
24
One of the Two Identical Channels
RTIPn
RRINGn
TTIPn
TRINGn
is set to ‘0’, the internal impedance matching circuit will be selected. In this
case, the R_TERM[1:0] bits (TERM, 02H...) can be set to choose 75 Ω, 100
Ω, 110 Ω or 120 Ω internal impedance of RTIPn/RRINGn. If R_TERM[2]
is set to ‘1’, the internal impedance matching circuit will be disabled. In this
case, the external impedance matching circuit will be used to realize the
impedance matching.
the cable for one channel.
ance matching for receiver.
120 Ω
Figure-8
R
R
Recovery
and Data
Clock
shows the appropriate external components to connect with
GNDRn
VDDRn
GNDTn
VDDTn
R_TERM[2:0]
Attenuator
Table-11
1XX
Jitter
0.1µF
0.1µF
External Termination
•
•
is the list of the recommended imped-
68µF
68µF
LOS/AIS
Detector
Decoder
3.3 V
1
3.3 V
1
December 12, 2005
120 Ω
100 Ω
110 Ω
75 Ω
R
R
LOS
RCLK
RDP
RDN