UJA1066TW/3V3,512 NXP Semiconductors, UJA1066TW/3V3,512 Datasheet - Page 18

• Manufacturer Part Number: UJA1066TW/3V3,512
• Manufacturer: NXP Semiconductors

Specifications of UJA1066TW/3V3,512

• Number Of Transceivers: 1
• Power Down Mode: Sleep/Standby
• Standard Supported: ISO 11898-2
• Operating Supply Voltage (min): 5.5V
• Operating Temperature (max): 125C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
UJA1066_2
Product data sheet
6.6.3.2 Voltage regulator V2
6.6.4 Switched battery output V3
A dedicated V1 supply comparator (V1 Monitor) monitors V1 for undervoltage events
(V
of the lower V1 undervoltage reset thresholds has been selected (see
Regulator V1 is overload protected. The maximum output current available at pin V1
depends on the voltage applied at pin BAT14 (see
power dissipation should be taken into account for thermal reasons.
Voltage regulator V2 provides a 5 V supply for the CAN transmitter. An external buffer
capacitor should be connected to pin V2.
V2 is controlled autonomously by the CAN transceiver control system and is activated on
any detected CAN-bus activity, or if the CAN transceiver is enabled by the application
microcontroller. V2 is short-circuit protected and will be disabled in an overload situation.
Dedicated bits in the System Diagnosis register and the Interrupt register provide V2
status feedback to the application.
In addition to being controlled autonomously by the CAN transceiver control system, V2
can be activated manually via bit V2C (in
applications when CAN is not actively used (e.g. while CAN is off-line). In general, V2
should not be used with other application hardware while CAN is in use.
If regulator V2 is unable to start up within the V2 clamped LOW time (> t
short circuit is detected while V2 is active, V2 is disabled and bit V2D in the Diagnosis
register is cleared (see
and the V2C bit is cleared (see in
Any of the following events will reactivate regulator V2:
V3 is a high-side switched BAT42-related output which is used to drive external loads
such as wake-up switches or relays. The features of V3 are as follows:
•
•
•
•
•
•
•
O(V1)
Clearing bit CTC while CAN is in Active mode
Wake up via CAN while CAN is not in Active mode
Setting bit V2C
Entering CAN Active mode
Three application controlled modes of operation; ON, OFF and Cyclic mode.
Two different cyclic modes allow for the supply of external wake-up switches; these
switches are powered intermittently, thus reducing system power consumption when a
switch is continuously active; the wake-up input of the SBC is synchronized with the
V3 cycle time.
The switch is protected against current overloads. If V3 is overloaded, pin V3 is
automatically disabled. The corresponding Diagnosis register bit (V3D) is reset and a
VFI interrupt is generated (if enabled). During Sleep mode, a wake-up is forced and
the corresponding reset source code (0100) can be read via the RSS bits of the
System Status register. This signals that the wake-up source via V3 supplied wake-up
switches has been lost.
< V
UV(VFI)
All information provided in this document is subject to legal disclaimers.
). This allows the application to receive a supply warning interrupt if one
Rev. 03 — 17 March 2010
Table
8). In addition, bit CTC in the Physical Layer register is set
Table
12).
Table
High-speed CAN fail-safe system basis chip
12). This allows V2 to be used in
Section 9 “Static
characteristics”). Total
Table
UJA1066
© NXP B.V. 2010. All rights reserved.
V2(CLT)
13).
), or if a
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