JS28F320J3F75A NUMONYX, JS28F320J3F75A Datasheet - Page 30

• Manufacturer Part Number: JS28F320J3F75A
• Description: PARALLEL NOR
• Manufacturer: NUMONYX

8.0
Table 16: Bus Operations
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
Table 17: Chip Enable Truth Table for 32-, 64-, 128-Mb
Datasheet
30
Async., Status, Query and
Identifier Reads
Output Disable
Standby
Reset/Power-down
Command Writes
Array Writes
Note:
See
OE# and WE# should never be asserted simultaneously. If done so, OE# overrides WE#.
DQ refers to DQ[7:0] when BYTE# is low and DQ[15:0] if BYTE# is high.
Refer to DC characteristics. When V
X should be V
In default mode, STS is V
algorithm. It is V
mode (with programming inactive), program suspend mode, or reset power-down mode.
See
operation.
Array writes are either program or erase operations.
For single-chip applications, CE2 and CE1 can be connected to VSS.
Table 17
Section 11.0, “Device Command Codes” on page 48
CE2
V
V
V
V
V
V
V
V
Mode
IH
IH
IH
IH
IL
IL
IL
IL
Bus Interface
This section provides an overview of Bus operations. The on-chip Write State Machine
(WSM) manages all erase and program algorithms. The system CPU provides control of
all in-system read, write, and erase operations through the system bus. All bus cycles
to or from the flash memory conform to standard microprocessor bus cycles.
summarizes the necessary states of each control signal for different modes of
operations.
IL
for valid CE
or V
OH
(pulled up by an external pull up resistance ≈ 10k) when the WSM is not busy, in block erase suspend
IH
for the control pins and V
OL
x
when the WSM is executing internal block erase, program, or a lock-bit configuration
configurations.
RP#
V
V
V
V
V
V
IH
IH
IH
IH
IH
IL
PEN
CE1
Disabled
V
V
V
V
V
V
V
V
Enabled
Enabled
Enabled
Enabled
≤
IH
IH
IH
IH
CE
IL
IL
IL
IL
Numonyx
V
X
x
PENLK
(1)
PENLK
, memory contents can be read but not altered.
OE#
®
V
V
V
V
Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)
X
X
or V
IH
IH
IH
IL
(2)
PENH
WE#
for V
V
V
V
V
X
X
IH
IH
IL
IL
(2)
PEN
. For outputs, X should be V
CE0
V
V
V
V
V
V
V
V
for valid DIN (user commands) during a Write
V
IH
IH
IH
IH
IL
IL
IL
IL
V
PENH
PEN
X
X
X
X
X
DQ
High Z
High Z
High Z
D
15:0
D
OUT
X
IN
(3)
OL
(Default
Mode)
High Z
High Z
High Z
High Z
High Z
or V
DEVICE
Disabled
Disabled
Disabled
Disabled
STS
Enabled
Enabled
Enabled
Enabled
V
IL
OH
.
Table 16
March 2010
208032-02
Notes
4,6
6,7
5,8
—
—
—