STLC5465B STMicroelectronics, STLC5465B Datasheet - Page 98

• Manufacturer Part Number: STLC5465B
• Description: Telecom ICs Multi-HDLC Sw Matrix
• Manufacturer: STMicroelectronics
• Type: Telecom IC - Variousr

Specifications of STLC5465B

• Operating Supply Voltage: 4.75 V to 5.25 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: PQFP-160
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

STLC5465B
IX - EXTERNAL REGISTERS (continued)
G0
A2/0
C6/1
A, E, S1/S4 bits received twice consecutively. Case of S0 = 1 S1 = 0.
Bit0/5 are not Significant when S0 = 0, S1 = 1.
IX.5.2 - Receive Command / Indicate Interrupt when TSV = 1
Time Stamping validated (bit of GCR Register)
These two words are located in the Command/Indicate interrupt queue.
First word see definition above.
T0/15: binary counter value when a new primitive is occured.
IX.6 - Receive Monitor Interrupt
IX.6.1 - Receive Monitor Interrupt when TSV = 0
TSV : Time Stamping not Validated (bit of GCR Register)
These two words are transferred into the Monitor interrupt queue ; IQSR Register indicates the size of this
interrupt queue located in the external memory.
NS
G0
L
F
A
98/101
bit15
bit15
M18
T15
NS
NS
: This bit defines one of two GCI y (DIN4/DOUT4 or DIN5/DOUT5).
: New Primitive received twice consecutively. Case of S0=S1=0.
M17
: New Status.
: G0 = 0, GCI 0 corresponding to DIN4 input and DOUT4 output.
: Last byte
: First byte
: Abort
: GCI Channel 0 to 7 belonging to GCI 0 or GCI 1.
T14
Nu
G0 = 0, GCI0 (DIN4/DOUT4) is the source.
G0 = 1, GCI1 (DIN5/DOUT5) is the source.
Before writing the features of event in the external memory the Interrupt Controller reads the
NS bit :
if NS = 0, the Interrupt Controller stores two new bytes M1/8 and M11/18 then puts NS bit at ‘1’
when it writes the status of these two bytes which has been received.
if NS = 1, the Interrupt Controller puts ICOV bit at ‘1’ to generate an interrupt (IR Register).
G0 = 1, GCI 1 corresponding to DIN5 input and DOUT5 output.
L=1, two cases:
if ODD = 1, the following word of the Interrupt Queue contains the Last byte of message
if ODD =0, the previous word of the Interrupt Queue (concerning this channel) contains the Last
byte of message.
L = 0, the following word and the previous word does not contains the Last byte of message.
F=1, the following word contains the First byte of message.
F=0, the following word does not contain the First byte of message.
A=1, Received message has been aborted.
M16
T13
Nu
M15
T12
Nu
M14
T11
G0
G0
M13
T10
A2
A2
M12
A1
A1
T9
M11
bit8
bit8
A0
T8
A0
bit7
bit7
M8
Nu
T7
Nu
M7
T6
C6/A
M6
T5
C5/E C4/S1 C3/S2 C2/S3 C1/S4
M5
T4
ODD
M4
T3
M3
T2
A
M2
T1
F
bit 0
bit 0
M1
T0
L