STLC5465B STMicroelectronics, STLC5465B Datasheet - Page 29

• Manufacturer Part Number: STLC5465B
• Description: Telecom ICs Multi-HDLC Sw Matrix
• Manufacturer: STMicroelectronics
• Type: Telecom IC - Variousr

Specifications of STLC5465B

• Operating Supply Voltage: 4.75 V to 5.25 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: PQFP-160
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

III - FUNCTIONAL DESCRIPTION (continued)
III.2.5 - Transparent Modes
In the transparentmode, the Multi-HDLC transmits
data in a completely transparent manner without
performing any bit manipulation or Flag insertion.
The transparent mode is per byte function.
Two transparent modes are offered :
- First mode : for the receive channels, the
- Secondmode: the Fill CharacterRegister specifies
As for the HDLC mode the correspondence
between the physical time slot and the logical
channel is fully defined in the Time Slot Assigner
memory (Time slot used or not used, logical chan-
nel number, source, destination).
III.2.6 - Command of the HDLC Channels
The microprocessor is able to control each HDLC
receive and transmit channel. Some of the com-
mands are specific to the transmission or the re-
ception but others are identical.
III.2.6.1 - Reception Control
The configuration of the controller operating mode
is: HDLC mode or Transparent mode.
The control of the controller: START, HALT, CON-
TINUE, ABORT.
- START : On a start command, the RxDMA con-
- HALT : For overloading reasons, the microproc-
- CONTINUE : The reception restarts in the next
- ABORT: On an abort command, the reception is
Reception of FLAG (01111110) or IDLE (11111111)
between Frames.
Address recognition. The microprocessor defines
Multi-HDLC continuously writes received bytes
into the external memory as specified in the cur-
rent receive descriptor without taking intoaccount
the Fill Character Register.
the ”fill character”which must be taken into account.
In reception,the ”fill character”will not be transferred
to theexternalmemory. Thedetectionof ”Fill charac-
ter” marks the end of a message and generates an
interruptifBINT=1 (see TransmitDescriptoronPage
95). When the ”Fill character”is not detected a new
message is receiving.
troller reads the address of the first descriptor in
the initialization block memory and is ready to
receive a frame.
essor can decide to halt the reception. The DMA
controller finishes transfer of the current frame to
external memory and stops. The channel can be
restarted on CONTINUE command.
descriptor.
instantaneously stopped. The channel can be
restarted on a START or CONTINUE command.
the addressesthat the Rx controller has to take into
account.
In transparent mode: ”fill character” register se-
lected or not.
III.2.6.2 - Transmission Control
The configuration of the controller operating mode
is : HDLC mode or Transparent mode.
The control of the controller : START, HALT, CON-
TINUE, ABORT.
- START : On a start command, the Tx DMAcontrol-
- HALT : The transmitter finishes to send the cur-
- CONTINUE : if the CONTINUE command occurs
- ABORT: On an abort command, the transmission
Transmission of FLAG (01111110 ) or IDLE
(111111111)between frames can be selected.
CRC can be generated or not. If the CRC is not
generated by the HDLC Controller, it must be lo-
cated in the shared memory.
In transparentmode: ”fill character” register can be
selected or not.
III.3 - C/I and Monitor
III.3.1 - Function Description
The Multi-HDLC is able to operate both GCI and V*
links. The TDM DIN/DOUT 4 and 5 are internally
connected to the CI and Monitor receivers/trans-
mitters. Since the controllers handle up to 16 CI and
16 Monitor channels simultaneously, the Multi-
HDLC can manage up to 16 level 1 circuits.
The Multi-HDLC can be used to support the CI and
monitor channels based on the following proto-
cols :
- ISDN V* protocol
- ISDN GCI protocol
- Analog GCI protocol.
ler reads the address of the first descriptor in the
initialization block memory and tries to transmit the
first frame if End Of Queue is not at ”1”.
rent frame and stops.The channel can be restart-
ed on a CONTINUE command.
after HALT command, the HDLC Transmitter re-
starts by transmitting the next buffer associated
to the next descriptor.
If the CONTINUE command occurs after an
ABORT command which has occurred during a
frame, the HDLC transmitter restarts by transmit-
ting the frame which has been effectively aborted
by the microprocessor.
of the current frame is instantaneously stopped,
an ABORT sequence ”1111111” is sent, followed
by IDLE or FLAG bytes. The channel can be
restarted on a START or CONTINUE command.
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