CYII5SC1300AA-QDC Cypress Semiconductor Corp, CYII5SC1300AA-QDC Datasheet - Page 27

• Manufacturer Part Number: CYII5SC1300AA-QDC
• Description: IC SENSOR IMMAGE COLOR 84-LCC
• Manufacturer: Cypress Semiconductor Corp
• Type: CMOS Imagingr

Specifications of CYII5SC1300AA-QDC

• Pixel Size: 6.7µm x 6.7µm
• Active Pixel Array: 1280H x 1024V
• Frames Per Second: 27
• Voltage - Supply: 3 V ~ 4.5 V
• Package / Case: 84-LCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 26. Pin List
Document #: 38-05710 Rev. *H
Pin
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
PXL_OUT2
AMP_CMD
COL_CMD
PC_CMD
VDDD
GNDD
GNDA
VDDA
VDDC
P_DATA<0>
P_DATA<1>
P_DATA<2>
P_DATA<3>
P_DATA<4>
P_DATA<5>
P_DATA<6>
P_DATA<7>
SI2_ADDR<0>
SI2_ADDR<1>
SI2_ADDR<2>
SI2_ADDR<3>
SI2_ADDR<4>
GNDAB
VDDR_RIGHT
ADC_VLOW
ADC_GNDA
ADC_VDDA
ADC_GNDD
ADC_VDDD
ADC_CLOCK
ADC_OUT<9>
ADC_OUT<8>
ADC_OUT<7>
ADC_OUT<6>
ADC_OUT<5>
ADC_OUT<4>
Pin Name
[8, 9, 10]
(continued)
Pin Type
Ground
Ground
Ground
Ground
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Analog output. Analog pixel output 2. Leave not connected if not used.
Analog input. Biasing of the output amplifier. Connect to VDDA with R = 50 kΩ and decouple
with C = 100 nF to GNDA.
Analog input. Biasing of the column amplifiers. Connect to VDDA with R = 50 kΩ and decouple
with C = 100 nF to GNDA.
Analog input. Pre-charge bias. Connect to VDDA with R = 25 kΩ and decouple with
C = 100 nF to GNDA.
Digital supply. Digital supply voltage of the image sensor [3.3 V].
Digital ground. Digital ground of the image sensor.
Analog ground. Analog ground of the image sensor.
Analog supply voltage. Analog supply voltage of the image sensor [3.3 V].
Analog supply voltage. Supply voltage of the pixel core [3.3 V].
Digital input. Data parallel interface (LSB).
Digital input. Data parallel interface.
Digital input. Data parallel interface.
Digital input. Data parallel interface.
Digital input. Data parallel interface.
Digital input. Data parallel interface.
Digital input. Data parallel interface.
Digital input. Data parallel interface.
Digital Input. Connect to GNDD.
Digital Input. Connect to GNDD.
Digital Input. Connect to GNDD.
Digital Input. Connect to GNDD.
Digital Input. Connect to GNDD.
Analog supply voltage. Anti-blooming ground.
Analog supply voltage. Variable reset voltage (multiple slope operation). Decouple with 1 μF
to GNDA.
Analog reference input. ADC low reference voltage.Default: Connect to GNDA with
R = 1200 Ω and decouple with C = 100 nF to GNDA.
Analog ground. ADC analog ground.
Analog supply voltage. ADC analog supply voltage [3.3 V].
Digital ground. ADC digital ground.
Digital supply voltage. ADC digital supply voltage [3.3 V].
Digital input. ADC clock (40 MHz).
Digital output. ADC data output (MSB).
Digital output. ADC data output.
Digital output. ADC data output.
Digital output. ADC data output.
Digital output. ADC data output.
Digital output. ADC data output.
Pin Description
CYII5SM1300AB
Page 27 of 35
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