CYII5SC1300AA-QDC Cypress Semiconductor Corp, CYII5SC1300AA-QDC Datasheet - Page 14

• Manufacturer Part Number: CYII5SC1300AA-QDC
• Description: IC SENSOR IMMAGE COLOR 84-LCC
• Manufacturer: Cypress Semiconductor Corp
• Type: CMOS Imagingr

Specifications of CYII5SC1300AA-QDC

• Pixel Size: 6.7µm x 6.7µm
• Active Pixel Array: 1280H x 1024V
• Frames Per Second: 27
• Voltage - Supply: 3 V ~ 4.5 V
• Package / Case: 84-LCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Nonlinear and Linear Conversion Mode—’gamma’ Correction
Figure 15
the images. It increases contrast in dark areas and reduces contrast in bright areas. The non-linear transfer function is given by the
following equation:
where a = 5; b = 0.027; x = digital output code
Sensor Digital Outputs
The digital outputs of the IBIS5-B-1300 sensor are not designed
to drive large loads. Hence, the outputs cannot be used to
directly drive cables or long traces on the PCB. If it is required to
drive traces more than 5 inches long, it is advisable to use a
buffer for all the digital signals given out by the sensor.
Sensor Clock Inputs
The ADC_CLOCK and the SYS_CLOCK of the sensor are
typically 180 phase shifted from each other. However, depending
on the board layout, it is possible that there may be a variation
(increased phase shift of ADC_CLOCK with respect to
SYS_CLOCK) in the phase shift between the clocks.
So, it is recommended that the phase shift between the clocks is
maintained programmable.
Clock Jitter Requirements:
Min low time: 11.00 ns
Min high time: 11.00 ns
max rise time: 5 ns
max fall time: 5 ns
Max Duty cycle: 47% to 53%
Max period jitter: 150 ps
It is important that the clock is stable, reproducible and has low
jitter. SYS_CLOCK and ADC_CLOCK are the most critical
clocks, both clock interact in the readout path and influence the
sensor performance.
Document #: 38-05710 Rev. *H
Vin
=
ADC_VHIGH
shows the ADC transfer characteristic. The nonlinear (exponential) ADC conversion is intended for gamma-correction of
+
(
ADC_VHIGH ADC_VLOW
–
Figure 15. Linear and Nonlinear ADC Conversion Characteristics
) *
---------------------------------------------- -
a*1023
a*x
+
+
b*x
b*1023
2
2
Black Calibration
Due to slight variations in the chip fabrication process, the output
analog voltage of the PGA is not perfectly matched to the input
analog range of the ADC. As a result, a reduced dynamic range
is compared when comparing sensors/cameras from different
lots. This is especially true in the dark as it is possible that a part
of the analog range gets clipped when it reaches the ADC.
For this reason, black calibration step is required. Because this
is a fixed setting, and varies very slightly with temperature, the
setting can be done at the factory itself.
While grabbing normal images, the settings can be loaded from
an on-board memory.
In the IBIS5 image sensor, black calibration step also tries to
match the output of the odd and even channels.
The steps for black calibration are -
1. Put the sensor in dark.
2. Change DAC_RAW such that no pixel or least number of
pixels (assuming there are defect pixels) have a zero ADC output
value.
3. Change DAC_FINE such that the average of the odd columns
is almost same as the even columns.
4. Change DAC_RAW again such that all pixels have a non-zero
output, but are as close to zero as possible.
5. Repeat for different gains.
CYII5SM1300AB
Page 14 of 35
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