CS5345-DQZR Cirrus Logic Inc, CS5345-DQZR Datasheet - Page 5

• Manufacturer Part Number: CS5345-DQZR
• Description: IC,Data Acquisition Signal Conditioner,6-CHANNEL,24-BIT,CMOS,QFP,48PIN,PLASTIC
• Manufacturer: Cirrus Logic Inc

DS658F2
1. PIN DESCRIPTIONS
Pin Name
SDA/CDOUT
SCL/CCLK
AD0/CS
AD1/CDIN
VLC
RESET
AIN3A
AIN3B
AIN2A
AIN2B
10
#
1
2
3
4
5
6
7
8
9
SDA/CDOUT
SCL/CCLK
AD1/CDIN
Pin Description
Serial Control Data (Input/Output) - SDA is a data I/O in I²C
the control port interface in SPI
Serial Control Port Clock (Input) - Serial clock for the serial control port.
Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C Mode;
CS is the chip-select signal for SPI format.
Address Bit 1 (I²C) / Serial Control Data Input (SPI) (Input) - AD1 is a chip address pin in I²C Mode;
CDIN is the input data line for the control port interface in SPI Mode.
Control Port Power (Input) - Determines the required signal level for the control port interface. Refer
to the Recommended Operating Conditions for appropriate voltages.
Reset (Input) - The device enters a low-power mode when this pin is driven low.
Stereo Analog Input 3 (Input) - The full-scale level is specified in the ADC Analog Characteristics
specification table.
Stereo Analog Input 2 (Input) - The full-scale level is specified in the ADC Analog Characteristics
specification table.
AD0/CS
RESET
AIN3A
AIN3B
AIN2A
AIN2B
AIN1A
AIN1B
VLC
10
11
12
1
2
3
5
6
7
8
9
4
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
CS5345
TM
Mode.
®
Mode. CDOUT is the output data line for
36
35
34
33
32
31
30
28
27
26
25
29
VLS
TSTO
NC
NC
AGND
AGND
VA
PGAOUTB
PGAOUTA
AIN6B
AIN6A
MICBIAS
CS5345
5