CS5345-DQZR Cirrus Logic Inc, CS5345-DQZR Datasheet - Page 20

• Manufacturer Part Number: CS5345-DQZR
• Description: IC,Data Acquisition Signal Conditioner,6-CHANNEL,24-BIT,CMOS,QFP,48PIN,PLASTIC
• Manufacturer: Cirrus Logic Inc

20
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT
Inputs: Logic 0 = DGND = AGND = 0 V, Logic 1 = VLC, C
SCL Clock Frequency
RESET Rising Edge to Start
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup time to SCL Rising
Rise Time of SCL and SDA
Fall Time SCL and SDA
Setup Time for Stop Condition
Acknowledge Delay from SCL Falling
R S T
S D A
S C L
19. Data must be held for sufficient time to bridge the transition time, t
20. Guaranteed by design.
Stop
t
t
irs
buf
Sta rt
t
t
Parameter
hdst
lo w
t
hdd
Figure 5. Control Port Timing - I²C Format
t
high
t sud
(Note 19)
(Note 20)
(Note 20)
t ack
L
= 30 pF.
Symbol
t
t
rc
fc
t
t
t
t
t
t
t
t
t
susp
f
hdst
high
sust
t
hdd
low
sud
ack
buf
scl
irs
, t
, t
rd
fd
R e p e ate d
t sust
fc
Sta rt
, of SCL.
Min
500
250
300
4.7
4.0
4.7
4.0
4.7
4.7
0
-
-
-
t
hdst
t rd
t rc
Max
1000
t fc
100
300
1
-
-
-
-
-
-
-
-
-
CS5345
t fd
DS658F2
Stop
Unit
t susp
kHz
ns
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
ns