CS5345-DQZR Cirrus Logic Inc, CS5345-DQZR Datasheet - Page 33

• Manufacturer Part Number: CS5345-DQZR
• Description: IC,Data Acquisition Signal Conditioner,6-CHANNEL,24-BIT,CMOS,QFP,48PIN,PLASTIC
• Manufacturer: Cirrus Logic Inc

DS658F2
6.4
6.4.1
6.5
6.5.1
6.6
6.6.1
Reserved
Reserved
Reserved
7
7
7
MCLK Frequency - Address 05h
PGAOut Control - Address 06h
Channel B PGA Control - Address 07h
Master Clock Dividers (Bits 6:4)
Function:
Sets the frequency of the supplied MCLK signal. See
PGAOut Source Select (Bit 6)
Function:
This bit is used to configure the PGAOut pins to be either high impedance or PGA outputs. Refer to
Table
Channel B PGA Gain (Bits 5:0)
Function:
See
“Channel A PGA Gain (Bits 5:0)” on page 34.
9.
Reserved
PGAOut
MCLK
Freq2
6
6
6
MCLK Divider
Reserved
Reserved
÷ 1.5
÷ 1
÷ 2
÷ 3
÷ 4
Reserved
MCLK
Freq1
Gain5
5
5
5
PGAOut
0
1
Table 9. PGAOut Source Selection
Table 8. MCLK Frequency
Reserved
MCLK Freq2
MCLK
Freq0
Gain4
4
4
4
0
0
0
0
1
1
1
PGAOutA & PGAOutB
High Impedance
PGA Output
Reserved
Reserved
Gain3
MCLK Freq1
3
Table 8
3
3
0
0
1
1
0
0
1
for the appropriate settings.
Reserved
Reserved
Gain2
2
2
2
MCLK Freq0
0
1
0
1
0
1
x
Reserved
Reserved
Gain1
1
1
1
CS5345
Reserved
Reserved
Gain0
0
0
0
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