PN5120A0HN/C1,518 NXP Semiconductors, PN5120A0HN/C1,518 Datasheet - Page 75

• Manufacturer Part Number: PN5120A0HN/C1,518
• Description: IC TRANSMISSION MOD 40-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of PN5120A0HN/C1,518

• Rf Type: Read / Write
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B
• Package / Case: 40-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
PN512
Product data sheet
COMPANY PUBLIC
Fig 22. Register read and write access
S
S
10.4.7 Register read access
SLAVE ADDRESS
SLAVE ADDRESS
I
I
2
[A7:A0]
2
[A7:A0]
S
C-BUS
C-BUS
To read out data from a specific register address in the PN512, the host controller must
use the following procedure:
After the write access, read access can start. The host sends the device address of the
PN512. In response, the PN512 sends the content of the read access register. In one
frame all data bytes can be read from the same register address. This enables fast FIFO
buffer access or register polling.
The Read/Write (R/W) bit is set to logic 1.
•
•
•
•
Firstly, a write access to the specific register address must be performed as indicated
in the frame that follows
The first byte of a frame indicates the device address according to the I
The second byte indicates the register address. No data bytes are added
The Read/Write bit is 0
sent by master
sent by slave
SLAVE ADDRESS
optional, if the previous access was on the same register address
(W)
(W)
I
0
0
2
[A7:A0]
C-BUS
All information provided in this document is subject to legal disclaimers.
A
A
Rev. 3.6 — 10 March 2011
0
(R)
1
0
111336
S
P
A
write cycle
read cycle
A
0
start condition
stop condition
acknowledge
0
JOINER REGISTER
[0:n]
ADDRESS [A5:A0]
JOINER REGISTER
ADDRESS [A5:A0]
DATA
DATA
[7:0]
[7:0]
[0:n]
A
A
A
W
R
A
not acknowledge
write cycle
read cycle
A
[0:n]
Transmission module
P
© NXP B.V. 2011. All rights reserved.
DATA
[7:0]
P
P
2
PN512
C-bus rules
001aak592
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A