UPD78F0886GA(A)-GAM-AX NEC, UPD78F0886GA(A)-GAM-AX Datasheet - Page 56

• Manufacturer Part Number: UPD78F0886GA(A)-GAM-AX
• Description: 8BIT MCU, 60K FLASH, 3KB RAM, CAN
• Manufacturer: NEC

Specifications of UPD78F0886GA(A)-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm Channels: 6
• Digital Ic Case Style: LQFP
• Core Size: 8bit
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

56
[Instruction format]
[Operation]
[Operand]
[Flag]
[Description]
[Description example]
ADDC
• The destination operand (dst) specified by the 1st operand, the source operand (src) specified by the 2nd
• If the addition result shows that dst is 0, the Z flag is set (1). In all other cases, the Z flag is cleared (0).
• If the addition generates a carry out of bit 7, the CY flag is set (1). In all other cases, the CY flag is cleared
• If the addition generates a carry for bit 4 out of bit 3, the AC flag is set (1). In all other cases, the AC flag
ADDC A, [HL+B]; The A register contents and the contents at address (HL register + (B register)) and the
Note Except r = A
operand and the CY flag are added and the result is stored in the destination operand (dst) and the CY flag.
The CY flag is added to the least significant bit. This instruction is mainly used to add two or more bytes.
(0).
is cleared (0).
Mnemonic
Z
×
ADDC
AC
×
A, #byte
saddr, #byte
A, r
r, A
A, saddr
CY flag are added and the result is stored in the A register.
ADDC dst, src
dst, CY ← dst + src + CY
CY
×
Operand(dst,src)
CHAPTER 5 EXPLANATION OF INSTRUCTIONS
User's Manual U12326EJ4V0UM
Note
Mnemonic
ADDC
A, !addr16
A, [HL]
A, [HL+byte]
A, [HL+B]
A, [HL+C]
Addition of Byte Data with Carry
Operand(dst,src)
Add with Carry