UPD78F0886GA(A)-GAM-AX NEC, UPD78F0886GA(A)-GAM-AX Datasheet - Page 30
UPD78F0886GA(A)-GAM-AX
Manufacturer Part Number
UPD78F0886GA(A)-GAM-AX
Description
8BIT MCU, 60K FLASH, 3KB RAM, CAN
Manufacturer
NEC
Datasheet
1.UPD78F0886GAA-GAM-AX.pdf
(129 pages)
Specifications of UPD78F0886GA(A)-GAM-AX
Controller Family/series
UPD78F
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm Channels
6
Digital Ic Case Style
LQFP
Core Size
8bit
Program Memory Size
60KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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3.2.7 Based addressing
3.2.8 Based indexed addressing
[Function]
[Operand format]
[Description example]
[Function]
[Operand format]
[Description example]
8-bit immediate data is added to the contents of the HL register pair as a base register and the sum is used
to address the memory. The HL register pair to be accessed is in the register bank specified by the register
bank select flag (RBS0 and RBS1). Addition is performed by expanding the offset data as a positive number
to 16 bits. A carry from the 16th bit is ignored. This addressing can be carried out for all the memory spaces.
MOV A, [HL+10H]; When setting byte to 10H
The B or C register contents specified in an instruction word are added to the contents of the HL register
pair as a base register and the sum is used to address the memory. The HL, B, and C registers to be accessed
are registers in the register bank specified by the register bank select flag (RBS0 to RBS1). Addition is
performed by expanding the B or C register as a positive number to 16 bits. A carry from the 16th bit is
ignored. This addressing can be carried out for all the memory spaces.
In the case of MOV A, [HL+B]
Identifier
Identifier
—
—
[HL+byte]
[HL+B], [HL+C]
Instruction code
Instruction code
User's Manual U12326EJ4V0UM
CHAPTER 3 ADDRESSING
Description
Description
1
0
1
0
0
0
1
0
1
0
1
0
1
0
1
1
0
0
1
0
1
0
0
1
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