RFHCS362GT-I/SO Microchip Technology, RFHCS362GT-I/SO Datasheet - Page 37

IC CODE HOPPNG ENCDR W/RF 18SOIC

RFHCS362GT-I/SO

Manufacturer Part Number
RFHCS362GT-I/SO
Description
IC CODE HOPPNG ENCDR W/RF 18SOIC
Manufacturer
Microchip Technology
Datasheet

Specifications of RFHCS362GT-I/SO

Frequency
310MHz ~ 440MHz
Applications
Automotive, Building Access, Garage Openers
Modulation Or Protocol
ASK, FSK
Data Rate - Maximum
3.3 kbps
Power - Output
-12dBm ~ 2dBm
Current - Transmitting
11.5mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
2.2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
7.0
Use of the rfHCS362G/362F in a system requires a
compatible decoder. This decoder is typically a micro-
controller with compatible firmware. Microchip will pro-
vide (via a license agreement) firmware routines that
accept transmissions from the rfHCS362G/362F and
decrypt the hopping code portion of the data stream.
These routines provide system designers the means to
develop their own decoding system.
7.1
A transmitter must first be ’learned’ by a decoder before
its use is allowed in the system. Several learning strat-
egies are possible, Figure 7-1 details a typical learn
sequence. Core to each, the decoder must minimally
store each learned transmitter’s serial number and cur-
rent synchronization counter value in EEPROM. Addi-
tionally, the decoder typically stores each transmitter’s
unique encryption key. The maximum number of
learned transmitters will therefore be relative to the
available EEPROM.
A transmitter’s serial number is transmitted in the clear
but the synchronization counter only exists in the code
word’s encrypted portion. The decoder obtains the
counter value by decrypting using the same key used
to encrypt the information. The K
symmetrical block cipher so the encryption and decryp-
tion keys are identical and referred to generally as the
encryption key. The encoder receives its encryption
key during manufacturing. The decoder is programmed
with the ability to generate an encryption key as well as
all but one required input to the key generation routine;
typically the transmitter’s serial number.
Figure 7-1 summarizes a typical learn sequence. The
decoder receives and authenticates a first transmis-
sion; first button press. Authentication involves gener-
ating the appropriate encryption key, decrypting,
validating the correct key usage via the discrimination
bits and buffering the counter value. A second trans-
mission is received and authenticated. A final check
verifies the counter values were sequential; consecu-
tive button presses. If the learn sequence is success-
fully complete, the decoder stores the learned
transmitter’s serial number, current synchronization
counter value and appropriate encryption key. From
now on the encryption key will be retrieved from
EEPROM during normal operation instead of recalcu-
lating it for each transmission received.
Certain learning strategies have been patented and
care must be taken not to infringe.
2002 Microchip Technology Inc.
INTEGRATING THE rfHCS362G/
362F INTO THE SYSTEM
Learning a Transmitter to a
Receiver
EE
L
OQ
algorithm is a
Preliminary
FIGURE 7-1:
Compare Discrimination
Compare Discrimination
Value with Fixed Value
Value with Fixed Value
Synchronization counter
of Second Valid Code
Learn successful Store:
from Serial Number
Use Generated Key
Use Generated Key
Wait for Reception
Wait for Reception
of a Valid Code
rfHCS362G/362F
Generate Key
Encryption key
Enter Learn
Serial number
Sequential
to Decrypt
to Decrypt
Counters
Mode
Equal
Equal
Exit
?
?
?
Yes
Yes
Yes
TYPICAL LEARN
SEQUENCE
No
No
No
DS41189A-page 37
Unsuccessful
Learn

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