TEF6607T/V5,518 NXP Semiconductors, TEF6607T/V5,518 Datasheet - Page 7

• Manufacturer Part Number: TEF6607T/V5,518
• Description: IC TUNER CAR RADIO AM/FM 32SOIC
• Manufacturer: NXP Semiconductors

Specifications of TEF6607T/V5,518

• Frequency: *
• Sensitivity: *
• Data Rate - Maximum: *
• Modulation Or Protocol: *
• Applications: *
• Current - Receiving: *
• Data Interface: *
• Memory Size: *
• Antenna Connector: *
• Features: *
• Voltage - Supply: *
• Operating Temperature: *
• Package / Case: 32-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935288264518

NXP Semiconductors
Table 3.
Pin names with prefix m are multiplexed pins. See
Table 4.
Pin names with prefix m are multiplexed pins. See
LPC3152_3154
Preliminary data sheet
Pin Symbol
9
13
17
Row T
1
5
9
13
17
Row U
1
5
9
13
17
TFBGA pin name
Clock generation unit
FFAST_IN
FFAST_OUT
VDDA12
VSSA12
RSTIN_N
CLOCK_OUT
10-bit ADC
ADC10B_VDDA33
ADC10B_GNDA
ADC10B_GPA0
ADC10B_GPA1
ADC10B_GPA2
Audio ADC
ADC_MIC
ADC_VINL
ADC_VINR
ADC_TINL
ADC_TINR
ADC_VREF
I2SRX_WS0
GPIO0
UOS_CX1
USB_DP
mLCD_DB_7
I2SRX_BCK0
mI2STX_DATA0
ADC_VREFP
n.c.
mLCD_DB_8
TMS
VDDI
RTC_CLK32
Pin allocation table
Pin description
TFB
GA
ball
A10
B10
B11
C11
E15
M4
B13
A13
B12
C13
C12
R15
T15
R14
P13
P14
T16
Pin Symbol
10
14
2
6
10
14
2
6
10
14
…continued
Digital
I/O
level
[1]
SUP1
SUP1
SUP1
-
SUP3
SUP4
SUP3
-
SUP3
SUP3
SUP3
-
-
-
-
-
-
UART_RXD
ADC_VINR
-
USB_GNDA
mLCD_DB_2
TDI
GPIO1
-
mLCD_DB_14
mLCD_DB_4
JTAGSEL
VSSI
-
All information provided in this document is subject to legal disclaimers.
Application
function
AI
AO
Supply
Ground
DI
DO
Supply
Ground
AI
AI
AI
AI
AI
AI
AI
AI
AO
Rev. 0.12 — 27 May 2010
Table 11
Table 11
Pin
state
after
reset
I:PU
O
for pin function selection of multiplexed pins.
for pin function selection of multiplexed pins.
Pin Symbol
11
15
3
7
11
15
3
11
15
7
[2]
Cell type
[3]
AIO2
AIO2
PS3
CG1
DIO2
DIO4
PS3
CG1
AIO1
AIO1
AIO1
AIO2
AIO2
AIO2
AIO2
AIO2
AIO2
mUART_RTS_N
ADC_MIC
-
USB_VDDA33_DRV
mLCD_DB_0
mI2STX_CLK0
ADC_VINL
-
mLCD_DB_13
VDDE_IOB
TRST_N
VDDE_IOC
-
Description
12 MHz oscillator clock input
12 MHz oscillator clock output
12 MHz oscillator/PLLs analog supply
12 MHz oscillator/PLLs analog ground
System reset input (active LOW)
Clock output
10-bit ADC analog supply
10-bit ADC analog ground
10-bit ADC analog input
10-bit ADC analog input
10-bit ADC analog input
ADC microphone input
ADC line input left
ADC line input right
ADC tuner input left
ADC tuner input right
ADC reference voltage output
LPC3152/3154
Pin Symbol
12
16
4
8
12
16
4
8
12
16
mI2STX_WS0
ADC_VREFN
-
mLCD_DB_12
mLCD_RW_WR
mI2STX_BCK0
ADC_VREF
-
mLCD_DB_11
VSSE_IOB
TCK
VSSE_IOC
-
© NXP B.V. 2010. All rights reserved.
7 of 88