LT5514EFE Linear Technology, LT5514EFE Datasheet - Page 11

• Manufacturer Part Number: LT5514EFE
• Description: IC IF AMP/ADC DRVR PROG 20TSSOP
• Manufacturer: Linear Technology

Specifications of LT5514EFE

• Function: Amplifier/ADC Driver
• Frequency: LF ~ 850MHz
• Secondary Attributes: Max Output 21dBm
• Package / Case: 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PI FU CTIO S
BLOCK DIAGRA
ENA (Pin 1): Enable Pin for Amplifier A. When the input
voltage is higher than 3V, amplifier A is turned on. When
the input voltage is less than or equal to 0.6V, amplifier A
is turned off. This pin is internally pulled to ground if not
connected.
V
to V
for example) may be required in some applications.
GND (Pins 3, 4, 7, 8, 13, 14, 17, 18): Ground.
IN
Bias.
IN
Bias.
PGA0 (Pin 9): Amplifier PGA Control Input Pin for the
1.5dB Attenuation Step (see Programmable Gain table).
Input is high when input voltage is greater than 3V. Input
is low when input voltage is less than or equal to 0.6V. This
pin is internally pulled to ground if not connected.
PGA1 (Pin 10): Amplifier PGA Control Input Pin for the
3dB Attenuation Step (see Programmable Gain table).
Input is high when input voltage is greater than 3V. Input
is low when input voltage is less than or equal to 0.6V. This
pin is internally pulled to ground if not connected.
PGA2 (Pin 11): Amplifier PGA Control Input Pin for the
6dB Attenuation Step (see Programmable Gain table).
CC1
+
–
U
CC2
(Pin 6): Negative Signal Input Pin with Internal DC
(Pin 5): Positive Signal Input Pin with Internal DC
(Pin 2): Power Supply. This pin is internally connected
(Pin 19). Decoupling capacitors (1000pF and 0.1 F
U
U
W
5
6
GND (3, 4, 7, 8
13, 14, 17, 18)
LT5514
IN
IN
+
–
VOLTAGE REGULATOR
AND BIAS
2
V
CC1
Figure 1. Functional Block Diagram
19
V
CC2
ATTENUATOR
12
R
100
IN
PGA3
GAIN CONTROL
11
LOGIC
PGA2
Input is high when input voltage is greater than 3V. Input
is low when input voltage is less than or equal to 0.6V. This
pin is internally pulled to ground if not connected.
PGA3 (Pin 12): Amplifier PGA Control Input Pin for 12dB
Attenuation Step (see Programmable Gain table). Input is
high when input voltage is greater than 3V. Input is low
when input voltage is less than or equal to 0.6V. This pin
is internally pulled to ground if not connected.
OUT
with center tap tied to V
mended to source the DC quiescent current.
OUT
with center tap tied to V
mended to source the DC quiescent current.
V
nected to V
ENB (Pin 20): Enable Pin for Amplifier B. When the input
voltage is higher than 3V, amplifier B is turned on. When
the input voltage is less than or equal to 0.6V, amplifier B
is turned off. This pin is internally pulled to ground if not
connected.
Exposed Pad (Pin 21): Ground. This pin must be soldered
to the printed circuit board ground plane for good heat
transfer.
10
CC2
PGA1
+
–
(Pin 19): Power Supply. This pin is internally con-
9
(Pin 16): Negative Amplifier Output. A transformer
(Pin 15): Positive Amplifier Output. A transformer
PGA0
AMPLIFIER A
AMPLIFIER B
CC1
20
CONTROL
ENABLE
ENB
(Pin 2).
1
ENA
OUT
OUT
5514 F01
+
CC
CC
–
16
15
21
or a choke inductor is recom-
or a choke inductor is recom-
LT5514
11
5514f