EM250-BBRD-R Ember, EM250-BBRD-R Datasheet - Page 28

EM250 BREAKOUT BOARD

EM250-BBRD-R

Manufacturer Part Number
EM250-BBRD-R
Description
EM250 BREAKOUT BOARD
Manufacturer
Ember
Type
Transceiver, 802.15.4r
Datasheet

Specifications of EM250-BBRD-R

Frequency
2.4GHz
For Use With/related Products
EM250
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
636-1024
EM250
120-0082-000S
The
ing for alternate GPIO functions as listed in Table 17. Refer to Table 1 for individual pin alternate functions.
Table 18 defines the alternate functions routed to the GPIO. To allow more flexibility, the timer signals can
come from alternative sources (e.g., TIM1IA.1, TIM1IA.2, TIM1IA.3), depending on what serial controller func-
tions are used.
The Always Connected input functions labeled IRQA, IRQB, IRQC, and IRQD refer to the external interrupts.
GPIO8, GPIO14, GPIO15, and GPIO16 are the only pins designed to operate as external interrupts (IRQs). These
pins offer individual filtering options, triggering options, and interrupt configurations. The minimum width
needed to latch an unfiltered external interrupt in both level and edge triggered mode is 80ns. With the filter
engaged via the GPIO_INTFILT bit, the minimum width needed is 450ns. Other alternate functions such as
timer input captures are capable of generating an interrupt based upon external signals, but these other al-
ternate functions do not contain the flexibility offered on the four external interrupts (IRQs).
When the core is powered down, peripherals stop driving correct output signals. To maintain correct output
signals, the system software will ensure that the GPIO output signals are frozen before going into deep sleep.
Note: Enabling alternate functions do not overwrite the pull-up and pull-down configurations, but the alter-
Monitoring circuitry is in place to detect when the logic state of GPIO input pins change. The lower 16 GPIO
pins that should be monitored can be chosen by software with the
can be used for waking up from deep sleep as described in section 4.15.
GPIO_DBG
nate function outputs are all forced to be totem-pole (except I
register must always remain set to zero. The
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GPIO_CFG
GPIO_WAKEL
2
register controls the GPIO signal rout-
C).
register. The resulting event

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