C8051F523A-IM Silicon Laboratories Inc, C8051F523A-IM Datasheet - Page 178

• Manufacturer Part Number: C8051F523A-IM
• Description: IC 8051 MCU 4K FLASH 10DFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F52xr

Specifications of C8051F523A-IM

• Program Memory Type: FLASH
• Program Memory Size: 4KB (4K x 8)
• Package / Case: 10-DFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 6
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.25 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: C8051F5x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI/UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F500DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1488 - KIT DEV C8051F53XA, C8051F52XA770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1455 - ADAPTER PROGRAM TOOLSTICK F520
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1491-5

C8051F52x/F52xA/F53x/F53xA
SFR Definition 17.14. LIN0ERR: LIN0 ERROR Register
178
Bits7–5: UNUSED. Read = 000b. Write = don’t care.
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
Bit7
R
SYNCH: Synchronization Error Bit (slave mode only).
0: No error with the SYNCH FIELD has been detected.
1: Edges of the SYNCH FIELD are outside of the maximum tolerance.
PRTY: Parity Error Bit (slave mode only).
0: No parity error has been detected.
1: A parity error has been detected.
TOUT: Timeout Error Bit.
0: A timeout error has not been detected.
1: A timeout error has been detected. This error is detected whenever one of the following
conditions is met:
•The master is expecting data from a slave and the slave does not respond.
•The slave is expecting data but no data is transmitted on the bus.
•A frame is not finished within the maximum frame length.
•The application does not set the DTACK bit (LIN0CTRL.4) or STOP bit (LIN0CTRL.7) until the
CHK: Checksum Error Bit.
0: Checksum error has not been detected.
1: Checksum error has been detected.
BITERR: Bit Transmission Error Bit.
0: No error in transmission has been detected.
1: The bit value monitored during transmission is different than the bit value sent.
end of the reception of the first byte after the identifier.
Bit6
R
Bit5
R
SYNCH
Bit4
R
Rev. 1.3
PRTY
Bit3
R
TOUT
Bit2
R
CHK
Bit1
R
BITERR
Bit0
Address: 0x0A (indirect)
R
Reset Value
00000000