MC9S12C128CFUE Freescale Semiconductor, MC9S12C128CFUE Datasheet - Page 91

IC MCU 128K FLASH 25MHZ 80-QFP

MC9S12C128CFUE

Manufacturer Part Number
MC9S12C128CFUE
Description
IC MCU 128K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12C128CFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
60
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4000 B
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
61
Number Of Timers
1
Operating Supply Voltage
- 0.3 V to + 6.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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2.3.2.3.4
Read: Anytime.
Write: Anytime.
2.3.2.3.5
Read: Anytime.
Write: Anytime.
Freescale Semiconductor
Module Base + 0x0013
Module Base + 0x0014
RDRM[5:0]
PERM[5:0]
Reset
Reset
Field
Field
5–0
5–0
W
W
R
R
Reduced Drive Port M — This register configures the drive strength of each port M output pin as either full or
reduced. If the port is used as input this bit is ignored.
0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.
Pull Device Enable Port M — This register configures whether a pull-up or a pull-down device is activated, if
the port is used as input or as output in wired-or (open drain) mode. This bit has no effect if the port is used as
push-pull output. Out of reset a pull-up device is enabled.
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
0
0
0
0
7
7
Port M Reduced Drive Register (RDRM)
Port M Pull Device Enable Register (PERM)
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 2-21. Port M Pull Device Enable Register (PERM)
0
0
0
0
6
6
Figure 2-20. Port M Reduced Drive Register (RDRM)
Table 2-18. RDRM Field Descriptions
Table 2-19. PERM Field Descriptions
RDRM5
PERM5
MC9S12C-Family / MC9S12GC-Family
0
1
5
5
RDRM4
PERM4
Rev 01.24
0
1
4
4
Description
Description
Chapter 2 Port Integration Module (PIM9C32) Block Description
RDRM3
PERM3
0
1
3
3
RDRM2
PERM2
0
1
2
2
RDRM1
PERM1
0
1
1
1
RDRM0
PERM0
0
1
0
0
91

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