MC9S12C128CFUE Freescale Semiconductor, MC9S12C128CFUE Datasheet - Page 113

• Manufacturer Part Number: MC9S12C128CFUE
• Description: IC MCU 128K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C128CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: CAN/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 60
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/2.97V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 4000 B
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 61
• Number Of Timers: 1
• Operating Supply Voltage: - 0.3 V to + 6.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

3.3.2.1
Read: Anytime
Write: Once in normal and emulation modes, anytime in special modes
This register initializes the position of the internal RAM within the on-chip system memory map.
Freescale Semiconductor
Module Base + 0x0010
Starting address location affected by INITRG register setting.
RAM[15:11]
RAMHAL
Reset
Field
7:3
0
W
R
RAM15
Internal RAM Map Position — These bits determine the upper five bits of the base address for the system’s
internal RAM array.
RAM High-Align — RAMHAL specifies the alignment of the internal RAM array.
0 Aligns the RAM to the lowest address (0x0000) of the mappable space
1 Aligns the RAM to the higher address (0xFFFF) of the mappable space
Initialization of Internal RAM Position Register (INITRM)
0
7
Writes to this register take one cycle to go into effect.
Figure 3-3. Initialization of Internal RAM Position Register (INITRM)
= Unimplemented or Reserved
RAM14
0
6
Table 3-2. INITRM Field Descriptions
RAM13
MC9S12C-Family / MC9S12GC-Family
0
5
RAM12
Rev 01.24
NOTE
0
4
Description
Chapter 3 Module Mapping Control (MMCV4) Block Description
RAM11
1
3
0
0
2
0
0
1
RAMHAL
1
0
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