C8051F344-GQ Silicon Laboratories Inc, C8051F344-GQ Datasheet - Page 33

• Manufacturer Part Number: C8051F344-GQ
• Description: IC 8051 MCU FLASH 64K 48TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F34xr

Specifications of C8051F344-GQ

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 48-TQFP, 48-VQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 40
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 20x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 5.25 KB
• Interface Type: I2C/SMBus/SPI/UART/USB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F340DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 17-ch x 10-bit
• No. Of I/o's: 40
• Ram Memory Size: 4352Byte
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• Package: 48TQFP
• Device Core: 8051
• Family Name: C8051F34x
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1748 - ADAPTER TOOLSTICK FOR C8051F34X770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1452 - ADAPTER PROGRAM TOOLSTICK F340
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1302

1.6.
C8051F340/1/4/5/8 devices include 40 I/O pins (five byte-wide Ports); C8051F342/3/6/7/9 devices include
25 I/O pins (three byte-wide Ports, and a 1-bit-wide Port). The C8051F340/1/2/3/4/5/6/7/8/9 Ports behave
like typical 8051 Ports with a few enhancements. Each Port pin may be configured as an analog input or a
digital I/O pin. Pins selected as digital I/Os may additionally be configured for push-pull or open-drain out-
put. The “weak pull-ups” that are fixed on typical 8051 devices may be globally disabled, providing power
savings capabilities.
The Digital Crossbar allows mapping of internal digital system resources to Port I/O pins (See Figure 1.9).
On-chip counter/timers, serial buses, HW interrupts, comparator outputs, and other digital signals in the
controller can be configured to appear on the Port I/O pins specified in the Crossbar Control registers. This
allows the user to select the exact mix of general purpose Port I/O and digital resources needed for the end
application.
Programmable Digital I/O and Crossbar
Highest
Priority
Lowest
Priority
SYSCLK
Outputs
Outputs
UART1*
UART0
SMBus
T0, T1
P0
P1
P2
P3
CP0
CP1
PCA
SPI
(P3.0-P3.7*)
(P0.0-P0.7)
(P1.0-P1.7)
(P2.0-P2.7)
Figure 1.9. Digital Crossbar Diagram
2
4
2
2
2
6
2
2
8
8
8
8
C8051F340/1/2/3/4/5/6/7/8/9
Rev. 1.1
XBR0, XBR1, XBR2,
PnSKIP Registers
Crossbar
Decoder
Priority
Digital
*Note: P3.1-P3.7 and UART1 only
available on 48-pin package
8
8
8
8
PnMDIN Registers
PnMDOUT,
Cells
Cells
Cells
Cells
P0
I/O
P1
I/O
P2
I/O
P3
I/O
P0.0
P0.7
P1.0
P1.7
P2.0
P2.7
P3.0
P3.7*
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