C8051F344-GQ Silicon Laboratories Inc, C8051F344-GQ Datasheet - Page 161

• Manufacturer Part Number: C8051F344-GQ
• Description: IC 8051 MCU FLASH 64K 48TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F34xr

Specifications of C8051F344-GQ

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 48-TQFP, 48-VQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 40
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 20x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 5.25 KB
• Interface Type: I2C/SMBus/SPI/UART/USB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F340DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 17-ch x 10-bit
• No. Of I/o's: 40
• Ram Memory Size: 4352Byte
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• Package: 48TQFP
• Device Core: 8051
• Family Name: C8051F34x
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1748 - ADAPTER TOOLSTICK FOR C8051F34X770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1452 - ADAPTER PROGRAM TOOLSTICK F340
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1302

Registers XBR0, XBR1, and XBR2 are used to assign the digital I/O resources to the physical I/O Port
pins. Note that when the SMBus is selected, the Crossbar assigns both pins associated with the SMBus
(SDA and SCL); when either UART is selected, the Crossbar assigns both pins associated with the UART
(TX and RX). UART0 pin assignments are fixed for bootloading purposes: UART TX0 is always assigned
to P0.4; UART RX0 is always assigned to P0.5. Standard Port I/Os appear contiguously after the prioritized
functions have been assigned.
Important Note: The SPI can be operated in either 3-wire or 4-wire modes, depending on the state of the
NSSMD1-NSSMD0 bits in register SPI0CN. According to the SPI mode, the NSS signal may or may not be
routed to a Port pin.
15.2. Port I/O Initialization
Port I/O initialization consists of the following steps:
Figure 15.5. Crossbar Priority Decoder in Example Configuration (3 Pins Skipped)
SF Signals
(32-pin
Package)
SF Signals
(48-pin
Package)
PIN I/O
TX0
RX0
SCK
MISO
MOSI
NSS*
SDA
SCL
CP0
CP0A
CP1
CP1A
SYSCLK
CEX0
CEX1
CEX2
CEX3
CEX4
ECI
T0
T1
TX1**
RX1**
SF Signals
Port pin assigned to peripheral by the Crossbar
Special Function Signals are not assigned by the Crossbar. When these signals are
enabled, the Crossbar must be manually configured to skip their corresponding port pins.
0
0
1
0
2
1
P0SKIP[0:7]
3
1
P0
4
0
5
0
6
0
7
0
0
1
*NSS is only pinned out in 4-wire SPI mode
1
0
2
0
P1SKIP[0:7]
3
0
P1
4
0
C8051F340/1/2/3/4/5/6/7/8/9
Rev. 1.1
5
0
6
0
7
0
0
0
1
0
2
0
P2SKIP[0:7]
3
0
P2
4
0
5
0
6
0
7
0
Example:
0
0
P3.1-P3.7 unavailable on the
1
0
2
0
32-pin packages
P3SKIP[0:7]
XBR0 = 0x07
XBR1 = 0x43
P0SKIP = 0x0C
P1SKIP = 0x01
3
0
P3
4
0
5
0
6
0
161
7
0