C8051F321-GMR Silicon Laboratories Inc, C8051F321-GMR Datasheet - Page 9

• Manufacturer Part Number: C8051F321-GMR
• Description: IC 8051 MCU 16K FLASH 28MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F321-GMR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: I2C, SMBus, SPI, UART, USB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F320DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel / 10 bit, 7 Channel
• Package: 28MLP
• Device Core: 8051
• Family Name: C8051F321
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 3.3 V
• For Use With: 336-1480 - DAUGHTER CARD TOOLSTCK C8051F321336-1449 - ADAPTER PROGRAM TOOLSTICK F321336-1260 - DEV KIT FOR C8051F320/F321
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

9. CIP-51 Microcontroller
10. Reset Sources
11. Flash Memory
12. External RAM
13. Oscillators
14. Port Input/Output
15. Universal Serial Bus Controller (USB)
16. SMBus
Figure 8.1. External Capacitors for Voltage Regulator Input/Output ........................ 67
Figure 8.2. REG0 Configuration: USB Bus-Powered ............................................... 68
Figure 8.3. REG0 Configuration: USB Self-Powered ............................................... 69
Figure 8.4. REG0 Configuration: USB Self-Powered, Regulator Disabled .............. 69
Figure 8.5. REG0 Configuration: No USB Connection............................................. 70
Figure 9.1. CIP-51 Block Diagram............................................................................ 71
Table 9.1. CIP-51 Instruction Set Summary............................................................ 73
Figure 9.2. Memory Map .......................................................................................... 77
Table 9.2. Special Function Register (SFR) Memory Map...................................... 79
Table 9.3. Special Function Registers .................................................................... 80
Table 9.4. Interrupt Summary ................................................................................. 89
Figure 10.1. Reset Sources...................................................................................... 99
Figure 10.2. Power-On and VDD Monitor Reset Timing ........................................ 100
Figure 11.1. Flash Program Memory Map and Security Byte................................. 108
Table 11.2. Flash Security Summary ..................................................................... 109
Figure 12.1. External Ram Memory Map................................................................ 114
Figure 12.2. XRAM Memory Map Expanded View ................................................. 115
Figure 13.1. Oscillator Diagram.............................................................................. 116
Table 13.1. Typical USB Full Speed Clock Settings............................................... 123
Table 13.2. Typical USB Low Speed Clock Settings.............................................. 124
Figure 14.1. Port I/O Functional Block Diagram ..................................................... 126
Figure 14.2. Port I/O Cell Block Diagram ............................................................... 127
Figure 14.3. Crossbar Priority Decoder with No Pins Skipped ............................... 128
Figure 14.4. Crossbar Priority Decoder with Crystal Pins Skipped ........................ 129
Figure 15.1. USB0 Block Diagram.......................................................................... 139
Table 15.1. Endpoint Addressing Scheme ............................................................. 140
Figure 15.2. USB0 Register Access Scheme......................................................... 142
Table 15.2. USB0 Controller Registers .................................................................. 144
Figure 15.3. USB FIFO Allocation .......................................................................... 147
Table 15.3. FIFO Configurations ............................................................................ 148
Figure 16.1. SMBus Block Diagram ....................................................................... 169
Table 8.1. Voltage Regulator Electrical Specifications ............................................ 68
Table 10.1. Reset Electrical Characteristics .......................................................... 105
Table 11.1. Flash Electrical Characteristics .......................................................... 107
Table 13.3. Internal Oscillator Electrical Characteristics ....................................... 125
Table 14.1. Port I/O DC Electrical Characteristics ................................................ 138
Table 15.4. USB Transceiver Electrical Characteristics ........................................ 168
Rev. 1.4
C8051F320/1
9