C8051F321-GMR Silicon Laboratories Inc, C8051F321-GMR Datasheet - Page 101

IC 8051 MCU 16K FLASH 28MLP

C8051F321-GMR

Manufacturer Part Number
C8051F321-GMR
Description
IC 8051 MCU 16K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheets

Specifications of C8051F321-GMR

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2.25 KB
Interface Type
I2C, SMBus, SPI, UART, USB
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
21
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F320DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel / 10 bit, 7 Channel
Package
28MLP
Device Core
8051
Family Name
C8051F321
Maximum Speed
25 MHz
Operating Supply Voltage
3.3 V
For Use With
336-1480 - DAUGHTER CARD TOOLSTCK C8051F321336-1449 - ADAPTER PROGRAM TOOLSTICK F321336-1260 - DEV KIT FOR C8051F320/F321
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F321-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Company:
Part Number:
C8051F321-GMR
Quantity:
60 000
10.2. Power-Fail Reset / VDD Monitor
When a power-down transition or power irregularity causes VDD to drop below V
monitor will drive the /RST pin low and hold the CIP-51 in a reset state (see Figure 10.2). When VDD
returns to a level above V
nal data memory contents are not altered by the power-fail reset, it is impossible to determine if VDD
dropped below the level required for data retention. If the PORSF flag reads ‘1’, the data may no longer be
valid. The VDD monitor is enabled after power-on resets; however its defined state (enabled/disabled) is
not altered by any other reset source. For example, if the VDD monitor is enabled and a software reset is
performed, the VDD monitor will still be enabled after the reset.
Important Note: The VDD monitor must be enabled before it is selected as a reset source. Selecting the
VDD monitor as a reset source before it is enabled and stabilized will cause a system reset. The procedure
for configuring the VDD monitor as a reset source is shown below:
See Figure 10.2 for VDD monitor timing. See Table 10.1 for complete electrical characteristics of the VDD
monitor.
Bit7:
Bit6:
Bits5–0: Reserved. Read = Variable. Write = don’t care.
VDMEN VDDSTAT Reserved Reserved Reserved Reserved Reserved Reserved
R/W
Bit7
Step 1. Enable the VDD monitor (VDM0CN.7 = ‘1’).
Step 2. Wait for the VDD monitor to stabilize (see Table 10.1 for the VDD Monitor turn-on time).
Step 3. Select the VDD monitor as a reset source (RSTSRC.1 = ‘1’).
VDMEN: VDD Monitor Enable.
This bit turns the VDD monitor circuit on/off. The VDD Monitor cannot generate system
resets until it is also selected as a reset source in register RSTSRC (Figure 10.2). The VDD
Monitor must be allowed to stabilize before it is selected as a reset source. Selecting the
VDD monitor as a reset source before it has stabilized will generate a system reset.
See Table 10.1 for the minimum VDD Monitor turn-on time. The VDD Monitor is enabled fol-
lowing all POR resets.
0: VDD Monitor Disabled.
1: VDD Monitor Enabled.
VDDSTAT: VDD Status.
This bit indicates the current power supply status (VDD Monitor output).
0: VDD is at or below the VDD monitor threshold.
1: VDD is above the VDD monitor threshold.
Bit6
R
SFR Definition 10.1.
RST
Bit5
, the CIP-51 will be released from the reset state. Note that even though inter-
R
Bit4
R
VDM0CN: VDD Monitor Control
Rev. 1.4
Bit3
R
Bit2
R
Bit1
R
C8051F320/1
RST
Bit0
R
, the power supply
SFR Address:
Reset Value
Variable
0xFF
101

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