ICL7104-16CPL Intersil, ICL7104-16CPL Datasheet - Page 7

• Manufacturer Part Number: ICL7104-16CPL
• Description: 16 BIT A/D CONVERTER
• Manufacturer: Intersil

Specifications of ICL7104-16CPL

• Rohs Status: RoHS non-compliant
• Other names: NT5019

HIGH BYTE
LOW BYTE
AS INPUT
AS INPUT
AS INPUT
AS INPUT
ENABLE
ENABLE
MIDDLE
SYMBOL
SYMBOL
CE/LD
MBEN
HBEN
LBEN
BYTE
DATA
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CWH
t
CWH
DHC
CDH
BEA
DAB
DHB
CEA
DAC
t
t
t
CEL
CEH
CBL
CBH
CDL
t
CBZ
CEZ
MW
SM
ME
MB
SS
XBEN (Min) Pulse Width.
Data Access Time from XBEN.
Data Hold Time from XBEN.
CE/LD Min. Pulse Width.
Data Access Time from CE/LD.
Data Hold Time from CE/LD.
CLOCK 1 High Time.
Mode Pulse (Min).
Mode Pin Set-Up Time.
Mode Pin High to Low Z CE/LD High Delay.
Mode Pin High to XBEN Low Z (High) Delay.
Clock 1 High to CE/LD Low Delay.
Clock 1 High to CE/LD High Delay.
Clock 1 High to XBEN Low Delay.
Clock 1 High to XBEN High Delay.
Clock 1 High to Data Enabled Delay.
Clock 1 Low to Data Disabled Delay.
Send ENABLE Set-Up Time.
Clock 1 High to XBEN Disabled Delay.
Clock 1 High to CE/LD Disabled Delay.
Clock 1 High Time.
t
DAB
TABLE 1. DIRECT MODE TIMING REQUIREMENTS (Note: Not tested in production)
TABLE 2. HANDSHAKE TIMING REQUIREMENTS (Note: Not tested in production)
= HIGH IMPEDANCE
t
BEA
VALID
DATA
DESCRIPTION
DESCRIPTION
FIGURE 4. DIRECT MODE TIMING DIAGRAM
t
DHB
ICL7104
7
VALID
DATA
1250
MIN
MIN
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
t
DAC
1000
1100
1100
2000
2000
1000
TYP
TYP
-150
-350
300
300
200
350
350
280
200
200
700
600
900
700
20
t
CEA
MAX
MAX
VALID
VALID
VALID
DATA
DATA
DATA
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
UNIT
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
DHC