EM35X-DEV-UPG-IAR Ember, EM35X-DEV-UPG-IAR Datasheet - Page 171
![IAR EWARM LICENCE FOR EM35X](/photos/28/43/284355/em35x-dev-upg-iar_sml.jpg)
EM35X-DEV-UPG-IAR
Manufacturer Part Number
EM35X-DEV-UPG-IAR
Description
IAR EWARM LICENCE FOR EM35X
Manufacturer
Ember
Type
Licenser
Specifications of EM35X-DEV-UPG-IAR
For Use With/related Products
EM35x
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
636-1028
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TIMx_CCR1
TIM1_CCR1
Timer 1 Capture/Compare Register 1
TIM2_CCR1
Timer 2 Capture/Compare Register 1
Bitname
TIM_CCR
31
23
15
7
0
0
30
22
14
0
0
6
Bitfield
[15:0]
29
21
13
0
0
5
Access
RW
Description
If the CC1 channel is configured as an output (TIM_CC1S = 0):
TIM_CCR1 is the buffer value to be loaded in the actual capture/compare 1 register. It is
loaded permanently if the preload feature is not selected in the TMR1_CCMR1 register
(bit OC1PE). Otherwise the buffer value is copied to the shadow capture/compare 1
register when an UEV occurs. The active capture/compare register contains the value to
be compared to the counter TMR1_CNT and signaled on the OC1 output.
If the CC1 channel is configured as an input (TIM_CC1S is not 0):
CCR1 is the counter value transferred by the last input capture 1 event (IC1).
28
20
12
4
0
0
TIM_CCR
TIM_CCR
Final
9-47
27
19
11
0
0
3
26
18
10
2
0
0
Address: 0x4000F034 Reset: 0x0
Address: 0x4000E034 Reset: 0x0
25
17
0
0
9
1
120-035X-000G
24
16
0
0
8
0
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