EM35X-DEV-UPG-IAR Ember, EM35X-DEV-UPG-IAR Datasheet - Page 137

IAR EWARM LICENCE FOR EM35X

EM35X-DEV-UPG-IAR

Manufacturer Part Number
EM35X-DEV-UPG-IAR
Description
IAR EWARM LICENCE FOR EM35X
Manufacturer
Ember
Type
Licenser

Specifications of EM35X-DEV-UPG-IAR

For Use With/related Products
EM35x
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
636-1028
EM351 / EM357
Figure 9-18. Capture/Compare Channel 1 Main Circuit
Figure 9-19 show details of the output stage of a capture/compare channel.
Figure 9-19. Output Stage of Capture/Compare Channel (Channel 1)
The capture/compare block is made of a buffer register and a shadow register. Writes and reads always access
the buffer register.
In capture mode, captures are first written to the shadow register, then copied into the buffer register.
In compare mode, the content of the buffer register is copied into the shadow register which is compared to
the counter.
9.3.5
Input Capture Mode
In input capture mode, a capture/compare register (TIMx_CCRy) latches the value of the counter after a
transition is detected by the corresponding ICy signal. When a capture occurs, the corresponding INT_TIMCCyIF
flag in the INT_TIMxFLAG register is set, and an interrupt request is sent if enabled.
9-13
120-035X-000G
Final

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