SI3210DCQ1-EVB Silicon Laboratories Inc, SI3210DCQ1-EVB Datasheet - Page 86

• Manufacturer Part Number: SI3210DCQ1-EVB
• Description: DAUGHTERCARD W/SI3201 INTERFACE
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r
• Type: SLIC/CODECr

Specifications of SI3210DCQ1-EVB

• Contents: Evaluation Board and CD-ROM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Si3210
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Si3210/Si3211
Register 51. Ringing Oscillator Inactive Timer—High Byte
Reset settings = 0000_0000
Register 52. FSK Data
Reset settings = 0000_0000
Register 63. Loop Closure Debounce Interval
Reset settings = 0011_0010 (revision C); 0101_0100 (subsequent revisions)
86
Name
Name
Name
Type
Type
Type
Bit
7:0
Bit
7:1
Bit
7:0
Bit
Bit
0
Bit
Reserved
RIT[15:8]
LCD[7:0]
FSKDAT
Name
Name
Name
D7
D7
D7
D6
D6
D6
Ringing Inactive Timer.
Read returns zero.
FSK Data.
When FSKEN = 1 (direct Register 108, bit 6) and REL = 1 (direct Register 32, bit 6), this
bit serves as the buffered input for FSK generation bit stream data.
Loop Closure Debounce Interval for Automatic Ringing.
This register sets the loop closure debounce interval for the ringing silent period when
using automatic ringing cadences. The value may be set between 0 ms (0x00) and
159 ms (0x7F) in 1.25 ms steps.
D5
D5
D5
D4
D4
D4
RIT[15:8]
LCD[7:0]
Rev. 1.42
R/W
D3
D3
D3
Function
Function
Function
D2
D2
D2
D1
D1
D1
FSKDAT
R/W
D0
D0
D0